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2020 – today
- 2024
[j8]Rui Liu
, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang:
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators. IEEE Des. Test 41(5): 46-54 (2024)- [j7]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication. IEEE Trans. Computers 73(6): 1427-1441 (2024) - [c6]Zerun Li, Xiaoming Chen, Yinhe Han:
TMiner: A Vertex-Based Task Scheduling Architecture for Graph Pattern Mining. MICRO 2024: 1295-1308 - [i1]Zengyou He, Zerun Li, Junjie Dong, Xinying Liu, Mudi Jiang, Lianyu Hu:
Conjunction Subspaces Test for Conformal and Selective Classification. CoRR abs/2410.12297 (2024) - 2023
- [j6]Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 2889-2902 (2023) - [c5]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator. DAC 2023: 1-6 - 2022
- [j5]Zerun Li, Qinglin Wang, Yufei Zhu, Zuocheng Xing:
Automatic Modulation Classification for MASK, MPSK, and MQAM Signals Based on Hierarchical Self-Organizing Map. Sensors 22(17): 6449 (2022) - [c4]Zerun Li, Xiaoming Chen, Yinhe Han:
Optimal Data Allocation for Graph Processing in Processing-in-Memory Systems. ASP-DAC 2022: 238-243 - [c3]Zerun Li, Xiaoming Chen, Yinhe Han:
GraphRing: an HMC-ring based graph processing framework with optimized data movement. DAC 2022: 1063-1068 - [c2]Mingjie Wei, Yunping Zhao, Jianzhuang Lu, Xiaowen Chen, Chen Li, Zerun Li:
Convolutional Neural Network Accelerator for Compression Based on Simon k-means. IJCNN 2022: 1-7 - 2021
- [j4]Yufei Zhu, Zuocheng Xing, Jinhui Xue, Zerun Li, Yifan Hu, Yang Zhang, Yongzhong Li:
Area-Efficient Parallel Reconfigurable Stream Processor for Symmetric Cryptograph. IEEE Access 9: 28377-28392 (2021) - [j3]Yufei Zhu, Zuocheng Xing, Zerun Li, Yang Zhang, Yifan Hu:
High Area-Efficient Parallel Encoder with Compatible Architecture for 5G LDPC Codes. Symmetry 13(4): 700 (2021) - 2020
- [j2]Zerun Li, Qinglin Wang, Weisong Liu, Qiang Xu, Zuocheng Xing, Yongzhong Li:
Practical AMC model based on SAE with various optimisation methods under different noise environments. IET Commun. 14(22): 4081-4088 (2020)
2010 – 2019
- 2018
- [j1]Zerun Li, Yang Guo, Sheng Liu, Junyang Zhang:
A task-based multi-core allocation mechanism for packet acceleration. IEICE Electron. Express 15(12): 20180414 (2018) - [c1]Yang Guo, Zerun Li:
A Novel Priority-Allocated Scheme for Flow-Based Queue Managers. HPCC/SmartCity/DSS 2018: 1002-1006
Coauthor Index
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