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ORCIDXiaoyu Zhang 0009
Person information
- affiliation: Chinese Academy of Sciences, Institute of Computing Technology, Center for Intelligent Computing Systems, Beijing, China
- affiliation: University of Chinese Academy of Sciences, School of Computer Science and Technology, Beijing, China
Other persons with the same name
- Xiaoyu Zhang (aka: Xiao-Yu Zhang) — disambiguation page
- Xiaoyu Zhang 0001 — AT&T Bell Laboratories, Murray Hill, NJ, USA
- Xiaoyu Zhang 0002
![[0000-0003-1630-6058]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-1630-6058")
— Chinese Academy of Sciences, Institute of Information Engineering, Beijing, China (and 1 more) - Xiaoyu Zhang 0003 — Civil Aviation University of China, College of Electronics, Information and Automation, Tianjin, China
- Xiaoyu Zhang 0004 — Shenyang Ligong University, School of Information Science and Engineering, China
- Xiaoyu Zhang 0005 — ShanghaiTech University, Shanghai, China
- Xiaoyu Zhang 0006 — Virginia Tech, VA, USA
- Xiaoyu Zhang 0007 — Beijing University of Civil Engineering and Architecture, China (and 2 more)
- Xiaoyu Zhang 0008 — Imperial College London, UK (and 1 more)
- Xiaoyu Zhang 0010 — Xidian University, State Key Laboratory of Integrated Service Networks, Xi'an, China
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2020 – today
- 2024
[j4]Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang:
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators. IEEE Des. Test 41(5): 46-54 (2024)- [j3]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication. IEEE Trans. Computers 73(6): 1427-1441 (2024) - 2023
- [j2]Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 2889-2902 (2023) - [c7]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator. DAC 2023: 1-6 - [c6]Boyu Long, Libo Shen, Xiaoyu Zhang, Yinhe Han, Xian-He Sun, Xiaoming Chen:
Meltrix: A RRAM-Based Polymorphic Architecture Enhanced by Function Synthesis. ICCAD 2023: 1-9 - [c5]Libo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang, Yinhe Han, Xiaoming Chen:
LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture. ICCAD 2023: 1-9 - [c4]Rui Tang, Xiaoyu Zhang, Rui Liu, Zhejian Luo, Xiaoming Chen, Yinhe Han:
Hardware-Software Co-Design for Content-Based Sparse Attention. ICCD 2023: 415-418 - 2022
- [j1]Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen:
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5071-5084 (2022) - [c3]Rui Liu, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeMIC: Multi-Operands in-Memory Computing Based on FeFETs. ASP-DAC 2022: 678-683 - 2021
- [c2]Tao Song, Xiaoming Chen, Xiaoyu Zhang, Yinhe Han:
BRAHMS: Beyond Conventional RRAM-based Neural Network Accelerators Using Hybrid Analog Memory System. DAC 2021: 1033-1038
2010 – 2019
- 2019
- [c1]Xiaoyu Zhang, Xiaoming Chen, Yinhe Han:
FeMAT: Exploring In-Memory Processing in Multifunctional FeFET-Based Memory Array. ICCD 2019: 541-549
Coauthor Index
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