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Irina Alam
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Journal Articles
- 2024
- [j4]Irina Alam
, Puneet Gupta
:
Achieving DRAM-Like PCM by Trading Off Capacity for Latency. IEEE Trans. Computers 73(4): 1180-1189 (2024) - 2023
- [j3]Irina Alam
, Tianmu Li
, Sean Brock, Puneet Gupta
:
DRDebug: Automated Design Rule Debugging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 606-615 (2023) - 2019
- [j2]Clayton Schoeny
, Frederic Sala
, Mark Gottscho
, Irina Alam, Puneet Gupta
, Lara Dolecek
:
Context-Aware Resiliency: Unequal Message Protection for Random-Access Memories. IEEE Trans. Inf. Theory 65(10): 6146-6159 (2019) - 2017
- [j1]Mark Gottscho
, Irina Alam, Clayton Schoeny, Lara Dolecek, Puneet Gupta
:
Low-Cost Memory Fault Tolerance for IoT Devices. ACM Trans. Embed. Comput. Syst. 16(5s): 128:1-128:25 (2017)
Conference and Workshop Papers
- 2022
- [c7]Irina Alam, Puneet Gupta
:
COMET: On-die and In-controller Collaborative Memory ECC Technique for Safer and Stronger Correction of DRAM Errors. DSN 2022: 124-136 - 2021
- [c6]Saptadeep Pal, Jingyang Liu, Irina Alam, Nicholas Cebry, Haris Suhail, Shi Bu, Subramanian S. Iyer, Sudhakar Pamarti
, Rakesh Kumar, Puneet Gupta
:
Designing a 2048-Chiplet, 14336-Core Waferscale Processor. DAC 2021: 1183-1188 - 2020
- [c5]Irina Alam, Puneet Gupta
:
SAME-Infer: Software Assisted Memory Resilience for Efficient Inference at the Edge. MEMSYS 2020: 10-22 - 2019
- [c4]Irina Alam, Saptadeep Pal, Puneet Gupta
:
Compression with multi-ECC: enhanced error resiliency for magnetic memories. MEMSYS 2019: 85-100 - 2018
- [c3]Irina Alam, Clayton Schoeny, Lara Dolecek, Puneet Gupta
:
Parity++: Lightweight Error Correction for Last Level Caches. DSN Workshops 2018: 114-120 - [c2]Clayton Schoeny, Irina Alam, Mark Gottscho, Puneet Gupta
, Lara Dolecek:
Error Correction and Detection for Computing Memories Using System Side Information. ITW 2018: 1-5 - 2017
- [c1]Clayton Schoeny, Frederic Sala, Mark Gottscho, Irina Alam, Puneet Gupta
, Lara Dolecek:
Context-aware resiliency: Unequal message protection for random-access memories. ITW 2017: 166-170
Informal and Other Publications
- 2018
- [i1]Irina Alam:
Lightweight Fault Tolerance in SRAM Based On-Chip Memories. University of California, Los Angeles, USA, 2018
Coauthor Index
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