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ORCIDAnuj Vaishnav
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2020 – today
- 2020
[j1]Anuj Vaishnav
, Khoa Dang Pham, Joseph Powell, Dirk Koch:
FOS: A Modular FPGA Operating System for Dynamic Workloads. ACM Trans. Reconfigurable Technol. Syst. 13(4): 20:1-20:28 (2020)- [c11]Khoa Dang Pham, Anuj Vaishnav, Joseph Powell, Dirk Koch:
A Self-Compilation Flow Demo on FOS - The FPGA Operating System. FPL 2020: 368 - [c10]Khoa Dang Pham, Dirk Koch, Anuj Vaishnav, Konstantinos Georgopoulos, Pavlos Malakonakis, Aggelos Ioannou, Iakovos Mavroidis:
Moving Compute towards Data in Heterogeneous multi-FPGA Clusters using Partial Reconfiguration and I/O Virtualisation. FPT 2020: 221-226 - [i1]Anuj Vaishnav, Khoa Dang Pham, Joseph Powell, Dirk Koch:
FOS: A Modular FPGA Operating System for Dynamic Workloads. CoRR abs/2001.09990 (2020)
2010 – 2019
- 2019
- [c9]Anuj Vaishnav, Khoa Dang Pham, Kristiyan Manev, Dirk Koch:
The FOS (FPGA Operating System) Demo. FPL 2019: 429 - [c8]Anuj Vaishnav, Khoa Dang Pham, Dirk Koch:
Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures. HEART 2019: 1:1-1:6 - [c7]Kristiyan Manev, Anuj Vaishnav, Charalampos Kritikakis, Dirk Koch:
Scalable Filtering Modules for Database Acceleration on FPGAs. HEART 2019: 4:1-4:6 - [c6]Kristiyan Manev, Anuj Vaishnav, Dirk Koch:
Unexpected Diversity: Quantitative Memory Analysis for Zynq UltraScale+ Systems. FPT 2019: 179-187 - 2018
- [c5]Anuj Vaishnav, Khoa Dang Pham, Dirk Koch, James Garside:
Resource Elastic Virtualization for FPGAs Using OpenCL. FPL 2018: 111-118 - [c4]Anuj Vaishnav, Khoa Dang Pham, Dirk Koch:
A Survey on FPGA Virtualization. FPL 2018: 131-138 - [c3]Anuj Vaishnav, Khoa Dang Pham, Dirk Koch:
Live Migration for OpenCL FPGA Accelerators. FPT 2018: 38-45 - [c2]Khoa Dang Pham, Edson L. Horta, Dirk Koch, Anuj Vaishnav, Thomas Kuhn:
IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs. MCSoC 2018: 36-43 - 2017
- [c1]Anuj Vaishnav, Jose Raul Garcia Ordaz, Dirk Koch:
A security library for FPGA interlays. FPL 2017: 1-4
Coauthor Index
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