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ORCIDShuang Liang 0010
Person information
- affiliation: Novauto Co., Ltd.
Other persons with the same name
- Shuang Liang — disambiguation page
- Shuang Liang 0001
![[0000-0003-0457-6093]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-0457-6093")
— Tongji University, Shanghai, China - Shuang Liang 0002 — University of Electronic Science and Technology of China, Chengdu, China (and 1 more)
- Shuang Liang 0003 — Northeast Normal University, School of Information Science and Technology, Changchun, China
- Shuang Liang 0004 — Chinese Academy of Sciences, State Key Laboratory of Management and Control for Complex Systems, Beijing, China (and 1 more)
- Shuang Liang 0005 — Xidian University, State Key Laboratory of Integrated Service Networks, Xi'an, China
- Shuang Liang 0006 — Nanjing University, School of Electronic Science and Engineering, Nanjing, China
- Shuang Liang 0007 — North China Institute of Aerospace Engineering, Langfang, China
- Shuang Liang 0008 — Space Engineering University, Beijing, China
- Shuang Liang 0009 — University of Science and Technology Beijing, School of Automation and Electrical Engineering, Beijing, China
- Shuang Liang 0011 — Xidian University, Academy of Advanced Interdisciplinary Research, Xi'an, China
- Shuang Liang 0012 — Tsinghua University, Institute of Microelectronics, Beijing, China
- Shuang Liang 0013 — Capital Normal University, College of Resource Environment and Tourism, Beijing, China (and 1 more)
- Shuang Liang 0014 — Xinjiang University, Xinjiang, China
- Shuang Liang 0015 — Nanjing University of Posts and Telecommunications, School of Geographic and Biologic Information, Nanjing, China
- Shuang Liang 0016 — Northwestern Polytechnical University, College of Energy and Power, Xi'an, China
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2020 – today
- 2024
[c10]Ye Mu, Weilin Liu, Chao Yu, Xuefei Ning, Zhong Cao, Zelai Xu, Shuang Liang, Huazhong Yang, Yu Wang:
Multi-Agent Vulnerability Discovery for Autonomous Driving Policy by Finding AV-Responsible Scenarios. CASE 2024: 2320-2327- 2022
- [c9]Yu Wang, Shulin Zeng, Kaiyuan Guo, Xuefei Ning, Yali Zhao, Zhongyuan Qiu, Changcheng Tang, Shuang Liang, Huazhong Yang:
Efficient Autonomous Driving System Design: From Software to Hardware. ISVLSI 2022: 373-375 - [c8]Xuefei Ning, Zixuan Zhou, Junbo Zhao, Tianchen Zhao, Yiping Deng, Changcheng Tang, Shuang Liang, Huazhong Yang, Yu Wang:
TA-GATES: An Encoding Scheme for Neural Network Architectures. NeurIPS 2022 - 2021
- [c7]Shuang Liang, Changcheng Tang, Xuefei Ning, Shulin Zeng, Jincheng Yu, Yu Wang, Kaiyuan Guo, Diange Yang, Tianyi Lu, Huazhong Yang:
Efficient Computing Platform Design for Autonomous Driving Systems. ASP-DAC 2021: 734-741 - [c6]Xuefei Ning, Changcheng Tang, Wenshuo Li, Zixuan Zhou, Shuang Liang, Huazhong Yang, Yu Wang:
Evaluating Efficient Performance Estimators of Neural Architectures. NeurIPS 2021: 12265-12277 - [i5]Weilin Liu, Ye Mu, Chao Yu, Xuefei Ning, Zhong Cao, Yi Wu, Shuang Liang, Huazhong Yang, Yu Wang:
Multi-Agent Vulnerability Discovery for Autonomous Driving with Hazard Arbitration Reward. CoRR abs/2112.06185 (2021) - 2020
- [j1]Yu Xing, Shuang Liang, Lingzhi Sui, Xijie Jia, Jiantao Qiu, Xin Liu, Yushun Wang, Yi Shan, Yu Wang:
DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2668-2681 (2020) - [i4]Xuefei Ning, Wenshuo Li, Zixuan Zhou, Tianchen Zhao, Yin Zheng, Shuang Liang, Huazhong Yang, Yu Wang:
A Surgery of the Neural Architecture Evaluators. CoRR abs/2008.03064 (2020) - [i3]Tianchen Zhao, Xuefei Ning, Songyi Yang, Shuang Liang, Peng Lei, Jianfei Chen, Huazhong Yang, Yu Wang:
BARS: Joint Search of Cell Topology and Layout for Accurate and Efficient Binary ARchitectures. CoRR abs/2011.10804 (2020) - [i2]Xuefei Ning, Changcheng Tang, Wenshuo Li, Songyi Yang, Tianchen Zhao, Niansong Zhang, Tianyi Lu, Shuang Liang, Huazhong Yang, Yu Wang:
aw_nas: A Modularized and Extensible NAS framework. CoRR abs/2012.10388 (2020)
2010 – 2019
- 2019
- [c5]Shulin Zeng, Yujun Lin, Shuang Liang, Junlong Kang, Dongliang Xie, Yi Shan, Song Han, Yu Wang, Huazhong Yang:
A Fine-Grained Sparse Accelerator for Multi-Precision DNN. FPGA 2019: 185 - [c4]Yu Xing, Shuang Liang, Lingzhi Sui, Zhen Zhang, Jiantao Qiu, Xijie Jia, Xin Liu, Yushun Wang, Yi Shan, Yu Wang:
DNNVM: End-to-End Compiler Leveraging Operation Fusion on FPGA-based CNN Accelerators. FPGA 2019: 187-188 - [c3]Kaiyuan Guo, Shuang Liang, Jincheng Yu, Xuefei Ning, Wenshuo Li, Yu Wang, Huazhong Yang:
Compressed CNN Training with FPGA-based Accelerator. FPGA 2019: 189 - [c2]Yiming Hu, Shuang Liang, Jincheng Yu, Yu Wang, Huazhong Yang:
On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA. ISVLSI 2019: 7-12 - [i1]Yu Xing, Shuang Liang, Lingzhi Sui, Xijie Jia, Jiantao Qiu, Xin Liu, Yushun Wang, Yu Wang, Yi Shan:
DNNVM : End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-based CNN Accelerators. CoRR abs/1902.07463 (2019) - 2018
- [c1]Shaoxia Fang, Lu Tian, Junbin Wang, Shuang Liang, Dongliang Xie, Zhongmin Chen, Lingzhi Sui, Qian Yu, Xiaoming Sun, Yi Shan, Yu Wang:
Real-Time Object Detection and Semantic Segmentation Hardware System with Deep Learning Networks. FPT 2018: 389-392
Coauthor Index
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