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ORCIDDebasis Mitra 0002
Person information
- affiliation: National Institute of Technology, Durgapur, India
Other persons with the same name
- Debasis Mitra — disambiguation page
- Debasis Mitra 0001 — Columbia University (and 1 more)
- Debasis Mitra 0003
![[0000-0002-4351-1252]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-4351-1252")
— Florida Institute of Technology (and 2 more)
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2010 – 2019
- 2018
[j9]Sukanta Bhattacharjee, Debasis Mitra, Bhargab B. Bhattacharya:
Robust In-Field Testing of Digital Microfluidic Biochips. ACM J. Emerg. Technol. Comput. Syst. 14(1): 5:1-5:17 (2018)- 2017
- [c10]Dharmendra Kumar, Chintoo Kumar, Shipra Gautam, Debasis Mitra:
Design of Practical Parity Generator and Parity Checker Circuits in QCA. iNIS 2017: 28-33 - 2016
- [j8]Dharmendra Kumar, Debasis Mitra:
Design of a practical fault-tolerant adder in QCA. Microelectron. J. 53: 90-104 (2016) - [i1]Dharmendra Kumar, Debasis Mitra, Bhargab B. Bhattacharya:
On Fault-Tolerant Design of Exclusive-OR Gates in QCA. CoRR abs/1612.02975 (2016) - 2015
- [j7]Sandip Ghosal, Debasis Mitra, Subhasis Bhattacharjee:
Certificate-based encoding of gate level description for secure transmission. Int. J. Electron. Secur. Digit. Forensics 7(1): 54-75 (2015) - [j6]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
Offline Washing Schemes for Residue Removal in Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 21(1): 17:1-17:33 (2015) - 2014
- [j5]Debasis Mitra, Sudip Roy, Sukanta Bhattacharjee, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
On-Chip Sample Preparation for Multiple Targets Using Digital Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1131-1144 (2014) - 2013
- [c9]Animesh Roy, Debasis Mitra:
Signature Embedding in the Functional Description of Reversible Circuit. SSCC 2013: 10-17 - 2012
- [j4]Sudip Roy, Debasis Mitra, Bhargab B. Bhattacharya, Krishnendu Chakrabarty:
Congestion-aware layout design for high-throughput digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 8(3): 17:1-17:23 (2012) - [c8]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
On-Line Error Detection in Digital Microfluidic Biochips. Asian Test Symposium 2012: 332-337 - [c7]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
Automated path planning for washing in digital microfluidic biochips. CASE 2012: 115-120 - [c6]Debasis Mitra, Sudip Roy, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
On-Chip Sample Preparation with Multiple Dilutions Using Digital Microfluidics. ISVLSI 2012: 314-319 - [c5]Sandip Ghosal, Debasis Mitra:
Secure transmission of gate level description. RAIT 2012: 157-162 - 2011
- [j3]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
Test Planning in Digital Microfluidic Biochips Using Efficient Eulerization Techniques. J. Electron. Test. 27(5): 657-671 (2011) - [c4]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
On residue removal in digital microfluidic biochips. ACM Great Lakes Symposium on VLSI 2011: 391-394 - 2010
- [j2]Debasis Mitra, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sandip Kundu, Ashish Nigam, Sandeep K. Dey:
Test pattern generation for droop faults. IET Comput. Digit. Tech. 4(4): 274-284 (2010) - [c3]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
Testing of Digital Microfluidic Biochips Using Improved Eulerization Techniques and the Chinese Postman Problem. Asian Test Symposium 2010: 111-116
2000 – 2009
- 2009
- [j1]Debasis Mitra, Susmita Sur-Kolay, Bhargab B. Bhattacharya:
Droop sensitivity of stuck-at fault tests. IET Comput. Digit. Tech. 3(2): 175-193 (2009) - 2008
- [c2]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Bhargab B. Bhattacharya, D. Dutta Majumder, Krishnendu Chakrabarty:
Accelerated Functional Testing of Digital Microfluidic Biochips. ATS 2008: 295-300 - 2006
- [c1]Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu:
Test Pattern Generation for Power Supply Droop Faults. VLSI Design 2006: 343-348
Coauthor Index
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