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Satyajit Mohapatra
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Journal Articles
- 2022
- [j3]Satyajit Mohapatra, Nihar Ranjan Mohapatra:
Dispersion in Placement: Quantification and Insights. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2380-2392 (2022) - [j2]Christian D. Newman, Michael John Decker, Reem S. Alsuhaibani, Anthony Peruma, Mohamed Wiem Mkaouer, Satyajit Mohapatra, Tejal Vishnoi, Marcos Zampieri, Timothy J. Sheldon, Emily Hill:
An Ensemble Approach for Annotating Source Code Identifiers With Part-of-Speech Tags. IEEE Trans. Software Eng. 48(9): 3506-3522 (2022) - 2020
- [j1]Satyajit Mohapatra, Nihar Ranjan Mohapatra:
Gradient Error Compensation in SC-MDACs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4359-4374 (2020)
Conference and Workshop Papers
- 2024
- [c11]Satyajit Mohapatra, Sanjeet Kumar Nayak:
Greedy Algorithms for Heterogeneous Drone Delivery Packing in the Cloud-assisted Intelligent Transportation System. COMSNETS 2024: 833-841 - [c10]Satyajit Mohapatra, Sanjeet Kumar Nayak:
Re-Max: A Reward Maximization Approach for Heterogeneous Drone Scheduling Problem. ICDCN 2024: 242-243 - 2023
- [c9]Bhaskar Rongali, Satyajit Mohapatra, Sanjeet Kumar Nayak:
A Secure Contactless Payment System with Bidirectional Blockchain and Blake Hash Function. TrustCom 2023: 318-325 - 2020
- [c8]Satyajit Mohapatra, Nihar Ranjan Mohapatra:
The Design of Ultra Low Power SAR ADC for Implantable Cardioverter Defibrillator (ICD). VLSID 2020: 72-77 - 2019
- [c7]Yadukrishnan Mekkattillam, Satyajit Mohapatra, Nihar R. Mohapatra:
Design and Calibration of 14-bit 10 KS/s Low Power SAR ADC for Bio-medical Applications. VDAT 2019: 590-604 - [c6]Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra, Sanjeev Mehta, Arup Roy Chowdhury, Nisha Pandya:
A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC. VLSID 2019: 305-310 - 2018
- [c5]Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra:
Mismatch Resilient 3.5-Bit MDAC with MCS-CFCS. ISVLSI 2018: 175-180 - [c4]Satyajit Mohapatra, Nihar Ranjan Mohapatra:
The HotSpot Compensation in High Speed Data Converters. MWSCAS 2018: 396-399 - 2017
- [c3]Jatindeep Singh, Satyajit Mohapatra, Nihar Ranjan Mohapatra:
Performance Optimized 64b/66b Line Encoding Technique for High Speed SERDES Devices. VDAT 2017: 56-61 - [c2]Satyajit Mohapatra, Hari Shanker Gupta, Jatindeep Singh, Nihar Ranjan Mohapatra:
A 64b/66b Line Encoding for High Speed Serializers. VLSID 2017: 303-308 - 2016
- [c1]Hari Shanker Gupta, Satyajit Mohapatra, Nihar R. Mohapatra, Dinesh Kumar Sharma:
Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array. ISQED 2016: 462-467
Informal and Other Publications
- 2021
- [i1]Christian D. Newman, Michael John Decker, Reem S. Alsuhaibani, Anthony Peruma, Satyajit Mohapatra, Tejal Vishnoi, Marcos Zampieri, Mohamed Wiem Mkaouer, Timothy J. Sheldon, Emily Hill:
An Ensemble Approach for Annotating Source Code Identifiers with Part-of-speech Tags. CoRR abs/2109.00629 (2021)
Coauthor Index
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