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ORCIDPaula López Martinez 0001
Paula López 0001
Person information
- affiliation: University of Santiago de Compostela, Spain
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2020 – today
- 2024
[j20]Marko Jaklin
, Daniel García-Lesta, Paula López, Víctor M. Brea:
Global shutter CMOS vision sensors and event cameras for on-chip dynamic information. Int. J. Circuit Theory Appl. 52(6): 3052-3065 (2024)- [j19]Óscar Pereira-Rial, Juan M. Carrillo, Paula López:
Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 5329-5338 (2024) - [j18]Peyman F. Shahandashti, Paula López, Víctor M. Brea, Daniel García-Lesta, Miguel Heredia Conde:
Simultaneous Multifrequency Demodulation for Single-Shot Multiple-Path ToF Imaging. IEEE Trans. Computational Imaging 10: 54-68 (2024) - [c53]Daniel García-Lesta, Fernando Pardo, Óscar Pereira-Rial, Víctor M. Brea, Paula López, Diego Cabello:
Live Demonstration: A Mixed-Mode Signal CMOS Chip for Hyperdimensional Computing. ISCAS 2024: 1 - [c52]Óscar Pereira-Rial, Daniel García-Lesta, Lorenzo Vaquero, Paula López, Víctor M. Brea, Diego Cabello:
Live Demonstration: 5-bit signed SRAM-based DNN CIM for Image Recognition. ISCAS 2024: 1 - 2023
- [j17]Óscar Pereira-Rial, Alessandro Cabrini, Guido Torelli, Paula López, Juan M. Carrillo:
Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 154-165 (2023) - [c51]Miguel Heredia Conde, Alvaro Lopez Paredes, Faisal Ahmed, Peyman F. Shahandashti, Paula López:
Recent Advances in Computational Time-of-Flight Imaging. ACSSC 2023: 1166-1173 - [c50]Faisal Ahmed, Miguel Heredia Conde, Paula López Martinez:
GIPS: Geometry-Inspired Passive ToF Sensing for 3D Depth Reconstruction. EUSIPCO 2023: 476-480 - [c49]Marko Jaklin, Daniel García-Lesta, Paula López, Víctor M. Brea:
CDS Free Frame Differencing Event Vision Pixel with Lateral Overflow Capacitor for Dynamic Range Extension. ICECS 2023: 1-4 - [c48]Laura Vicente-García, Óscar Pereira-Rial, Paula López:
Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems. SMACD 2023: 1-4 - 2022
- [j16]Zhouyan Qiu, Joaquín Martínez-Sánchez, Víctor M. Brea, Paula López, Pedro Arias:
Low-cost mobile mapping system solution for traffic sign segmentation using Azure Kinect. Int. J. Appl. Earth Obs. Geoinformation 112: 102895 (2022) - [j15]Óscar Pereira-Rial, Paula López, Juan M. Carrillo:
0.6-V-VIN 7.0-nA-IQ 0.75-mA-IL CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 599-608 (2022) - [j14]Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Víctor M. Brea, Diego Cabello:
An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 844-848 (2022) - [c47]Daniel García-Lesta, Óscar Pereira-Rial, Víctor M. Brea, Paula López, Diego Cabello:
A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation. ICECS 2022 2022: 1-4 - [c46]Marko Jaklin, Daniel García-Lesta, Víctor M. Brea, Paula López:
Low-Power Techniques on a CMOS Vision Sensor Chip for Event Generation by Frame Differencing with High Dynamic Range. ICECS 2022 2022: 1-4 - [c45]Peyman F. Shahandashti, Paula López, Víctor M. Brea, Daniel García-Lesta, Miguel Heredia Conde:
Fast Time-Domain Super-Resolution for Single-Shot Multi- Path ToF Imaging. ICECS 2022 2022: 1-4 - [c44]Faisal Ahmed, Miguel Heredia Conde, Paula López Martinez, Thomas Kerstein, Bernd Buxbaum:
Live Demonstration: VLC-enabled Passive 3D Time-of-Flight Imaging. IEEE SENSORS 2022: 1 - [c43]Faisal Ahmed, Miguel Heredia Conde, Paula López Martinez, Thomas Kerstein, Bernd Buxbaum:
Passive 3D Time-of-Flight Imaging leveraging VLC Infrastructure. IEEE SENSORS 2022: 1-4 - [c42]Daniel García-Lesta, Fernando Pardo, Óscar Pereira-Rial, Víctor M. Brea, Paula López:
HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing. ISCAS 2022: 496-500 - [c41]Óscar Pereira-Rial, Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello:
Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models. ISCAS 2022: 702-706 - [c40]Peyman F. Shahandashti, Paula López, Víctor M. Brea, Daniel García-Lesta, Miguel Heredia Conde:
A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation. ISCAS 2022: 1430-1434 - 2021
- [c39]Peyman F. Shahandashti, Paula López, Víctor M. Brea, Daniel García-Lesta, Miguel Heredia Conde:
Proposal of a Single-Shot Multi-Frame Multi-Frequency CMOS ToF Sensor. ICECS 2021: 1-4 - [c38]Marko Jaklin, Daniel García-Lesta, Víctor M. Brea, Paula López:
HDR 4T-APS Pixel for Event Generation by Frame Differencing. MWSCAS 2021: 921-924 - 2020
- [j13]Ginés Doménech-Asensi, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, José Ángel Díaz-Madrid, Víctor Manuel Brea Sánchez, Paula López:
All-hardware SIFT implementation for real-time VGA images feature extraction. J. Real Time Image Process. 17(2): 371-382 (2020) - [j12]Diego Cabello, Esteban Ferro, Óscar Pereira-Rial, Beatriz Martínez-Vázquez, Víctor M. Brea, Juan M. Carrillo, Paula López:
On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(4): 1103-1114 (2020) - [c37]Óscar Pereira-Rial, Paula López, Raquel Pérez-Aloe, Juan M. Carrillo, Juan Francisco Duque-Carrillo:
Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations. ICECS 2020: 1-4 - [c36]Tobi Delbrück, Ibrahim Abe M. Elfadel, Shahzad Muzaffar, Germain Haessig, Bo Wang, Amine Bermak, Rui Graca, Luis A. Camuñas-Mesa, Bathiya Senevirathna, Pamela Abshire, Bernabé Linares-Barranco, Saeed Afshar, Shih-Chii Liu, Runchun Mark Wang, Piotr Dudek, Stephen J. Carey, José M. de la Rosa, Marc Dandin, Sheung Lu, Vincent Frick, Teresa Serrano-Gotarredona, Paula López, Melika Payvand, Advait Madhavan, Eric R. Fossum, Juan Camilo Vasquez Tieck, Ian Williams, Yan Liu, Timothy G. Constandinou, Alexander Serb, Ricardo Carmona-Galán, Robert Nawrocki, Walter D. Leon-Salas:
Lessons Learned the Hard Way. ISCAS 2020: 1-18 - [c35]Daniel García-Lesta, Paula López, Víctor M. Brea, Diego Cabello:
A CMOS Vision Sensor for Background Subtraction. ISCAS 2020: 1-5 - [c34]Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Víctor M. Brea, Diego Cabello:
1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j11]Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Víctor M. Brea, Diego Cabello:
Ultralow power voltage reference circuit for implantable devices in standard CMOS technology. Int. J. Circuit Theory Appl. 47(7): 991-1005 (2019) - [j10]Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor M. Brea, Paula López:
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications. IEEE Internet Things J. 6(3): 5423-5431 (2019) - [c33]Óscar Pereira-Rial, Juan M. Carrillo, Paula López, Víctor M. Brea, Diego Cabello:
Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm2 Subthreshold Voltage Reference for Implantable Devices. ICECS 2019: 386-389 - [c32]Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor M. Brea, Paula López:
Live Demonstration: Deep Learning-Based Visual Tracking of Multiple Objects on a Low-Power Embedded System. ISCAS 2019: 1 - [c31]Esteban Ferro, Paula López, Víctor M. Brea, Diego Cabello:
On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications. ISCAS 2019: 1-5 - [c30]J. Illade-Quinteiro, Paula López, Víctor M. Brea, Diego Cabello:
Time-of-Flight Pixel with Homodyne Phase Demodulation in Standard CMOS Technology. ISCAS 2019: 1-5 - 2018
- [j9]Julio Illade-Quinteiro, Paula López, Víctor M. Brea, Diego Cabello:
Pulsed time-of-flight pixel with on-chip 20 klux background light suppression in standard CMOS technology. Int. J. Circuit Theory Appl. 46(5): 987-1005 (2018) - [j8]Daniel García-Lesta, Paula López, Víctor Manuel Brea Sánchez, Diego Cabello:
In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors. Int. J. Circuit Theory Appl. 46(9): 1631-1647 (2018) - [c29]Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor Manuel Brea Sánchez, Paula López:
Live Demonstration: Deep Learning-Based Multiple Object Detection and Tracking on a Low-Power Embedded System. ICDSC 2018: 22:1-22:2 - [c28]Ricardo Carmona-Galán, Jorge Fernández-Berni, Ángel Rodríguez-Vázquez, Paula López Martinez, Víctor Manuel Brea Sánchez, Diego Cabello Ferrer, Ginés Doménech-Asensi, Ramón Ruiz Merino, Juan Zapata-Pérez:
Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision. ICDSC 2018: 24:1-24:2 - [c27]Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello:
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up. ISCAS 2018: 1- - [c26]Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello:
Shannon Entropy as Background Dynamics Estimator In Foreground Detector Algorithms. ISCAS 2018: 1-4 - [c25]Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello:
Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms. ISCAS 2018: 1-5 - [c24]Tapani Nevalainen, Esteban Ferro, Víctor M. Brea, Paula López, Ari Paasio:
Low-Power Regulator for Micro Energy Harvesting Applications. NORCAS 2018: 1-5 - [i1]Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor M. Brea, Paula López:
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications. CoRR abs/1808.01356 (2018) - 2017
- [c23]Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello:
Effect of temporal and spatial noise on the performance of hardware oriented background extraction algorithms. NEWCAS 2017: 45-48 - 2016
- [j7]Esteban Ferro, Paula López, Víctor M. Brea, Diego Cabello:
Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting. Int. J. Circuit Theory Appl. 44(10): 1874-1894 (2016) - [c22]Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello:
Dynamic model of on-chip inverting capacitive charge pumps with charge reusing. ISCAS 2016: 1626-1629 - [c21]J. Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello:
Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations. ISCAS 2016: 1910-1913 - [c20]Daniel García-Lesta, Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello, J. Iglesias, J. Castillejo:
Live demonstration: Wireless sensor network for snail pest detection. ISCAS 2016: 2371 - 2015
- [j6]Julio Illade-Quinteiro, Víctor M. Brea, Paula López Martinez, Diego Cabello, Ginés Doménech-Asensi:
Distance Measurement Error in Time-of-Flight Sensors Due to Shot Noise. Sensors 15(3): 4624-4642 (2015) - [c19]J. Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello:
Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors. ISCAS 2015: 353-356 - [c18]Daniel García-Lesta, Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello, J. Iglesias, J. Castillejo:
Capacitance-based wireless sensor mote for snail pest detection. SAS 2015: 1-6 - 2014
- [c17]Pablo Leyva, Ginés Doménech-Asensi, F. Javier Garrigós, Julio Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello:
Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm. FPL 2014: 1-4 - 2013
- [c16]Beatriz Blanco-Filgueira, Paula López, Manuel Suarez, Juan Bautista Roldán:
CMOS photodiode model and HDL implementation. ECCTD 2013: 1-4 - [c15]Víctor M. Brea, Manuel Suarez, J. Illade-Quinteiro, Paula López, Diego Cabello, Ginés Doménech-Asensi:
Voltage boosters for on-chip solar cells on focal-plane processors. ICECS 2013: 393-396 - 2012
- [j5]Beatriz Blanco-Filgueira, Paula López, Juan Bautista Roldán:
A Verilog-AMS photodiode model including lateral effects. Microelectron. J. 43(12): 980-984 (2012) - [c14]Beatriz Blanco-Filgueira, Paula López, Jens Döge, Manuel Suarez, Juan Bautista Roldán:
Evidence of the lateral collection significance in small CMOS photodiodes. ISCAS 2012: 3098-3101 - 2011
- [c13]Paula López, Beatriz Blanco-Filgueira, Johann Hauer:
Modeling and experimental results of short channel annular MOS transistors. ECCTD 2011: 685-688 - 2010
- [c12]Beatriz Blanco-Filgueira, Paula López, Jens Döge:
Analytical model for p-n junctions under point source illumination. ICECS 2010: 906-909
2000 – 2009
- 2009
- [j4]Fernando Pardo, Paula López, Diego Cabello, Marco Balsi:
Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields. Comput. Geosci. 35(11): 2239-2249 (2009) - [j3]Paula López, Johann Hauer, Beatriz Blanco-Filgueira, Diego Cabello:
A dc I-V model for short-channel polygonal enclosed-layout transistors. Int. J. Circuit Theory Appl. 37(2): 163-177 (2009) - [c11]Paula López, Beatriz Blanco-Filgueira, Diego Cabello, Johann Hauer:
A study of CMOS radiation tolerant transistors using green functions. ECCTD 2009: 715-718 - 2008
- [c10]Fernando Pardo, Paula López Martinez, Diego Cabello:
FPGA-based hardware accelerator of the heat equation with applications on infrared thermography. ASAP 2008: 179-184 - 2007
- [c9]Paula López, Diego Cabello, Hans Hauer:
Improved Analytical I-V model for polygonal-shape enclosed layout transistors. ECCTD 2007: 755-758 - [c8]Fernando Pardo, Paula López, Diego Cabello:
Soft-Hard 3D FD-TD Solver for Non Destructive Evaluation. FPL 2007: 17-22 - 2006
- [c7]Fernando Pardo, Paula López, Diego Cabello, Marco Balsi:
FPGA Implementation of 3-D Thermal Model Simulator. FPL 2006: 1-4 - 2005
- [c6]Paula López, Matthias Oberst, Harald Neubauer, Johann Hauer, Diego Cabello:
Practical considerations on doughnut transistors design. ECCTD 2005: 213-216 - [c5]Fernando Pardo, Paula López, Diego Cabello, Marco Balsi:
FPGA Finite-Difference Time-Domain solver for thermal simulation. FPL 2005: 721-722 - [c4]Paula López, Matthias Oberst, Harald Neubauer, Johann Hauer, Diego Cabello:
Performance analysis of high-speed MOS transistors with different layout styles. ISCAS (4) 2005: 3688-3691 - 2004
- [j2]Paula López Martinez, Luc Van Kempen, Hichem Sahli, Diego Cabello Ferrer:
Improved thermal analysis of buried landmines. IEEE Trans. Geosci. Remote. Sens. 42(9): 1965-1975 (2004) - 2002
- [j1]Paula López, David López Vilariño, Víctor M. Brea, Diego Cabello:
Robustness oriented design tool for multilayer DTCNN applications. Int. J. Circuit Theory Appl. 30(2-3): 195-210 (2002) - 2000
- [c3]Paula López, David López Vilariño, Diego Cabello:
Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms. ISCAS 2000: 133-136 - [c2]Paula López, Marco Balsi, David López Vilariño, Diego Cabello:
Antipersonnel mine detection on infrared images. ISTAS 2000: 109-113
1990 – 1999
- 1999
- [c1]Paula López, David López Vilariño, Diego Cabello:
Genetic Algorithm Based Training for Multilayer Discrete-Time Cellular Neural Networks. IWANN (2) 1999: 467-476
Coauthor Index
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