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ORCIDXiaopeng Zhang 0009
Person information
- affiliation: Huawei Technologies, Shenzhen, China
- affiliation (former): Chinese University of Hong Kong, Hong Kong
Other persons with the same name
- Xiaopeng Zhang — disambiguation page
- Xiaopeng Zhang 0001
![[0000-0002-0092-6474]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-0092-6474")
— Chinese Academy of Sciences, Institute of Automation, LIAMA-NLPR, Beijing, China - Xiaopeng Zhang 0002 — Oracle (and 1 more)
- Xiaopeng Zhang 0003 — Qualcomm Canada Inc.
- Xiaopeng Zhang 0004 — Harbin Institute of Technology
- Xiaopeng Zhang 0005 — Shandong Jianzhu University
- Xiaopeng Zhang 0006 — University of Maryland
- Xiaopeng Zhang 0007 — Beihang University, Department of Computer Science and Engineering, Beijing, China
- Xiaopeng Zhang 0008 — National University of Singapore, Singapore (and 1 more)
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2020 – today
- 2024
[c10]Qijing Wang, Xiaopeng Zhang, Martin D. F. Wong, Evangeline F. Y. Young:
ControLayout: Conditional Diffusion for Style-Controllable and Violation-Fixable Layout Pattern Generation. ACM Great Lakes Symposium on VLSI 2024: 511-515- [i2]Fangzhou Wang, Qijing Wang, Lilas Alrahis, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Ozgur Sinanoglu, Tsung-Yi Ho, Evangeline F. Y. Young, Johann Knechtel:
TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans. CoRR abs/2405.05590 (2024) - 2023
- [c9]Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young:
Security Closure of IC Layouts Against Hardware Trojans. ISPD 2023: 229-237 - 2022
- [j1]Bentian Jiang, Jingsong Chen, Jinwei Liu, Lixin Liu, Fangzhou Wang, Xiaopeng Zhang, Evangeline F. Y. Young:
CU.POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1888-1901 (2022) - [c8]Jinwei Liu, Xiaopeng Zhang, Shiju Lin, Xinshi Zang, Jingsong Chen, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young:
Partition and place finite element model on wafer-scale engine. DAC 2022: 631-636 - [c7]Xiaopeng Zhang, Shoubo Hu, Zhitang Chen, Shengyu Zhu, Evangeline F. Y. Young, Pengyun Li, Cheng Chen, Yu Huang, Jianye Hao:
RCANet: Root Cause Analysis via Latent Variable Interaction Modeling for Yield Improvement. ITC 2022: 100-107 - [i1]Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young:
Security Closure of IC Layouts Against Hardware Trojans. CoRR abs/2211.07997 (2022) - 2021
- [c6]Dan Zheng, Xiaopeng Zhang, Chak-Wa Pui, Evangeline F. Y. Young:
Multi-FPGA Co-optimization: Hybrid Routing and Competitive-based Time Division Multiplexing Assignment. ASP-DAC 2021: 176-182 - [c5]Xiaopeng Zhang, Haoyu Yang, Evangeline F. Y. Young:
Attentional Transfer is All You Need: Technology-aware Layout Pattern Generation. DAC 2021: 169-174 - [c4]Bentian Jiang, Xiaopeng Zhang, Lixin Liu, Evangeline F. Y. Young:
Building up End-to-end Mask Optimization Framework with Self-training. ISPD 2021: 63-70 - 2020
- [c3]Xiaopeng Zhang, James P. Shiely, Evangeline F. Y. Young:
Layout Pattern Generation and Legalization with Generative Learning Models. ICCAD 2020: 32:1-32:9 - [c2]Bentian Jiang, Jingsong Chen, Jinwei Liu, Lixin Liu, Fangzhou Wang, Xiaopeng Zhang, Evangeline F. Y. Young:
CU.POKer: Placing DNNs on Wafer-Scale Al Accelerator with Optimal Kernel Sizing. ICCAD 2020: 142:1-142:9
2010 – 2019
- 2019
- [c1]Bentian Jiang, Xiaopeng Zhang, Ran Chen, Gengjie Chen, Peishan Tu, Wei Li, Evangeline F. Y. Young, Bei Yu:
FIT: Fill Insertion Considering Timing. DAC 2019: 221
Coauthor Index
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