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ORCIDKevin W. Gorman
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2010 – 2019
- 2016
[j4]Kelly A. Ockunzzi
, Michael R. Ouellette, Kevin W. Gorman:
Practical Application of RAM Sequential Test. IEEE Des. Test 33(6): 31-37 (2016)- 2015
- [c6]Kelly A. Ockunzzi, Michael R. Ouellette, Kevin W. Gorman:
Optimizing delay tests at the memory boundary. ITC 2015: 1-9 - 2011
- [j3]Darren Anand, Kevin W. Gorman, Mark Jacunski, Adrian Paparelli:
Embedded DRAM in 45-nm Technology and Beyond. IEEE Des. Test Comput. 28(1): 14-21 (2011)
2000 – 2009
- 2007
- [j2]Kevin W. Gorman, Daneyand Singley, Yuichi Motai:
Synchronous collaborative systems for distributed virtual environments in Java. Int. J. Comput. Appl. Technol. 29(1): 27-36 (2007) - [c5]Darren Anand, Jim Covino, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Mark Jacunski, Jake Paparelli, Gary Pomichter, Dale E. Pontius, Michael Roberge, Stephen Sliva:
A 1.0GHz multi-banked embedded DRAM in 65nm CMOS featuring concurrent refresh and hierarchical BIST. CICC 2007: 795-798 - [c4]Kevin W. Gorman, Michael Roberge, Adrian Paparelli, Gary Pomichter, Stephen Sliva, William Corbin:
Advancements in at-speed array BIST: multiple improvements. ITC 2007: 1-10 - 2006
- [c3]Kevin W. Gorman, Darren Anand, Gary Pomichter, William R. Corbin:
Low Cost Test of High Bandwidth Embedded Memories. CICC 2006: 445-448 - 2005
- [j1]John E. Barth Jr., Darren Anand, Steve Burns, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Michael R. Nelms, Erik Nelson, Adrian Paparelli, Gary Pomichter, Dale E. Pontius, Stephen Sliva:
A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining. IEEE J. Solid State Circuits 40(1): 213-222 (2005) - [c2]Kevin W. Gorman, Daneyand Singley, Yuichi Motai:
Synchronization methods for supporting distributed 3D virtual environments in JavaTM. Advances in Computer Entertainment Technology 2005: 318-321 - 2004
- [c1]Michael R. Nelms, Kevin W. Gorman, Darren Anand:
Generating At-Speed Array Fail Maps with Low-Speed ATE. VTS 2004: 87-96
Coauthor Index
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