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Robert E. Jones
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2010 – 2019
- 2011
- [j4]Ankur Jain, Syed M. Alam, Scott Pozder, Robert E. Jones:
Thermal-electrical co-optimisation of floorplanning of three-dimensional integrated circuits under manufacturing and physical design constraints. IET Comput. Digit. Tech. 5(3): 169-178 (2011) - 2010
- [j3]Ioannis Savidis, Syed M. Alam, Ankur Jain, Scott Pozder, Robert E. Jones, Ritwik Chatterjee:
Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits. Microelectron. J. 41(1): 9-16 (2010) - [j2]Syed M. Alam, Robert E. Jones, Scott Pozder, Ritwik Chatterjee, Shahid Rauf, Ankur Jain:
Interstratum Connection Design Considerations for Cost-Effective 3-D System Integration. IEEE Trans. Very Large Scale Integr. Syst. 18(3): 450-460 (2010)
2000 – 2009
- 2009
- [c5]Syed M. Alam, Robert E. Jones, Scott Pozder, Ankur Jain:
Die/wafer stacking with reciprocal design symmetry (RDS) for mask reuse in three-dimensional (3D) integration technology. ISQED 2009: 569-575 - 2008
- [c4]Robert E. Jones:
Tutorial 3: Process Technology Development and New Design Opportunities in 3D Integration Technology. ISQED 2008: 5 - 2007
- [c3]Syed M. Alam, Robert E. Jones, Shahid Rauf, Ritwik Chatterjee:
Inter-Strata Connection Characteristics and Signal Transmission in Three-Dimensional (3D) Integration Technology. ISQED 2007: 580-585
1990 – 1999
- 1999
- [c2]Pong P. Chu, Robert E. Jones:
Reconfigurable FPGA for Network Performance Evaluation. PDPTA 1999: 1124-1130 - 1998
- [c1]Robert E. Jones:
Ferroelectric nonvolatile memories for embedded applications. CICC 1998: 431-438
1960 – 1969
- 1962
- [j1]George K. Chang, Robert E. Jones, Arnold M. Toxen:
Thermal Conductivity of Dilute Indium-Mercury Superconducting Alloys. IBM J. Res. Dev. 6(1): 112-115 (1962)
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