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ORCIDMiroslaw Chmiel
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2010 – 2019
- 2019
[j2]Miroslaw Chmiel
:
FPGA-based implementation of bistable function blocks defined in the IEC 61131. Microprocess. Microsystems 65: 37-46 (2019)- 2016
- [j1]Miroslaw Chmiel, Józef Kulisz, Robert Czerwinski, A. Krzyzyk, Marcin Rosol, Patryk Smolarek:
An IEC 61131-3-based PLC implemented by means of an FPGA. Microprocess. Microsystems 44: 28-37 (2016) - 2015
- [c8]Miroslaw Chmiel, Edward Hrynkiewicz, Dariusz Polok, Jan Mocha:
Popular microcontrollers execute IEC 61131-3 standard operators and functional blocks in simply automatic control tasks. MMAR 2015: 643-648 - 2013
- [c7]Robert Czerwinski, Miroslaw Chmiel, Wojciech Wygrabek:
FPGA Implementation of Programmable Logic Controller Compliant with EN 61131-3. PDeS 2013: 138-143 - [c6]Miroslaw Chmiel, Jan Mocha, Edward Hrynkiewicz, Dariusz Polok:
About Implementation of IEC 61131-3 IL Operators in Standard Microcontrollers. PDeS 2013: 144-149 - [c5]Józef Kulisz, Miroslaw Chmiel, Andrzej Malcher:
Generating Time Intervals in Programmable Logic Controllers. PDeS 2013: 360-365 - 2012
- [c4]Miroslaw Chmiel, Edward Hrynkiewicz:
The dynamic properties investigation of the PLC CPU implemented in FPGA. PDeS 2012: 151-156 - 2010
- [c3]Miroslaw Chmiel, Jan Mocha, Edward Hrynkiewicz:
A FPGA-based bit-word PLC CPUs development platform. PDeS 2010: 132-137 - [c2]Józef Kulisz, Robert Czerwinski, Jan Mocha, Miroslaw Chmiel:
A PC-based object simulator for supporting PLC software development. PDeS 2010: 215-220
2000 – 2009
- 2009
- [c1]Miroslaw Chmiel, Edward Hrynkiewicz:
An idea of event-driven program tasks execution. PDeS 2009: 17-22
Coauthor Index
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