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Hyeon-June Kim
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2020 – today
- 2024
- [j14]Hyeon-June Kim, Dong-Yeon Lee, Min-Jun Park:
Development and validation of a 64-channel ROIC prototype for SWIR line scan sensor applications. Integr. 98: 102226 (2024) - [j13]Hyeon-June Kim:
Design of A prototype 128 × 128 ROIC array for 2.6 μm-wavelength SWIR image sensor applications. Integr. 98: 102232 (2024) - [j12]Hyeon-June Kim, Soon-Kyu Kwon, Tae-Hoon Eom:
An Intrascene Wide Dynamic Range CMOS Image Sensor Using Dual-Gain Ramp Generator for Machine Vision Applications. IEEE Trans. Instrum. Meas. 73: 1-8 (2024) - [j11]Soon-Kyu Kwon, Hyung-Gi Byun, Hyeon-June Kim:
An Analog Adaptive Reference Generation Readout Integrated Circuit for Baseline-Free Gas Sensor Measurements. IEEE Trans. Instrum. Meas. 73: 1-8 (2024) - 2023
- [j10]Jun-Nyeong Kim, Hyeon-June Kim:
A Chemoresistive Gas Sensor Readout Integrated Circuit With Sensor Offset Cancellation Technique. IEEE Access 11: 85405-85413 (2023) - [j9]Cheol Ho Kim, Hyeon-June Kim:
Theoretical and Experimental Analysis of Reversed Uneven Power Splitting Technique in GaN MMIC Doherty Power Amplifiers. IEEE Access 11: 126098-126109 (2023) - [j8]Sunghyun Bae, Hyeon-June Kim:
Two-Channel OTDM System for Data-Center Interconnects: A Review. Sensors 23(13): 5908 (2023) - 2022
- [j7]Dong-Yeon Lee, Joon-Boo Yu, Hyung-Gi Byun, Hyeon-June Kim:
Chemoresistive Sensor Readout Circuit Design for Detecting Gases with Slow Response Time Characteristics. Sensors 22(3): 1102 (2022) - 2021
- [j6]Je-Hoon Lee, Hyeon-June Kim:
Black-sun noise immune correlated double sampling scheme for CMOS image sensors. IEICE Electron. Express 18(10): 20210175 (2021) - [j5]Hyeon-June Kim:
11-bit Column-Parallel Single-Slope ADC With First-Step Half-Reference Ramping Scheme for High-Speed CMOS Image Sensors. IEEE J. Solid State Circuits 56(7): 2132-2141 (2021)
2010 – 2019
- 2019
- [j4]Hyeon-June Kim, Eun-Gyu Lee, Choul-Young Kim:
A High-Multi Target Resolution Focal Plane Array-Based Laser Detection and Ranging Sensor. Sensors 19(5): 1210 (2019) - 2017
- [j3]Hyeon-June Kim, Sun-Il Hwang, Jae-Hyun Chung, Jong-Ho Park, Seung-Tak Ryu:
A Dual-Imaging Speed-Enhanced CMOS Image Sensor for Real-Time Edge Image Extraction. IEEE J. Solid State Circuits 52(9): 2488-2497 (2017) - 2016
- [j2]Hyeon-June Kim, Sun-Il Hwang, Ji-Wook Kwon, Dong-Hwan Jin, Byoung Soo Choi, Sang-Gwon Lee, Jong-Ho Park, Jang-Kyoo Shin, Seung-Tak Ryu:
A Delta-Readout Scheme for Low-Power CMOS Image Sensors With Multi-Column-Parallel SAR ADCs. IEEE J. Solid State Circuits 51(10): 2262-2273 (2016) - 2015
- [j1]Dong-Hwan Jin, Ji-Wook Kwon, Hyeon-June Kim, Sun-Il Hwang, Min-Chul Shin, Junho Cheon, Seung-Tak Ryu:
A 15 µm-Pitch, 8.7-ENOB, 13-Mcells/sec Logarithmic Readout Circuit for Multi-Level Cell Phase Change Memory. IEEE J. Solid State Circuits 50(10): 2431-2440 (2015) - [c2]Hyeon-June Kim, Sun-Il Hwang, Ji-Wook Kwon, Dong-Hwan Jin, Byoung Soo Choi, Sang-Gwon Lee, Jong-Ho Park, Jang-Kyoo Shin, Seung-Tak Ryu:
Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs. A-SSCC 2015: 1-4 - 2014
- [c1]Ji-Wook Kwon, Dong-Hwan Jin, Hyeon-June Kim, Sun-Il Hwang, Min-Chul Shin, Jong-Ho Kang, Seung-Tak Ryu:
A two-step 5b logarithmic ADC with minimum step-size of 0.1% full-scale for MLC phase-change memory readout. CICC 2014: 1-4
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last updated on 2024-12-02 22:31 CET by the dblp team
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