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2020 – today
- 2025
[j4]Jun-Hwan Jang, Hui-Dong Gwon, Sungmin Yoo, Jun-Hyeok Yang, Byong-Deok Choi:
A 0.5-1-V Time-Voltage Hybrid Domain Dual- Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm. IEEE J. Solid State Circuits 60(1): 272-285 (2025)- 2022
- [j3]Jun-Hwan Jang
, Hui-Dong Gwon, Tae-Hwang Kong, Jun-Hyeok Yang, Byong-Deok Choi:
A 0.5-1 V, -68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS. IEEE J. Solid State Circuits 57(8): 2462-2473 (2022)
2010 – 2019
- 2019
- [j2]Sang-Han Lee, Jun-Suk Bang, Kye-Seok Yoon, Hui-Dong Gwon, Sang-Won Kim, In-Kui Cho, Sung-Wan Hong, Gyu-Hyeong Cho:
Voltage-Boosted Current-Mode Wireless Power Receiver for Directly Charging a Low-Voltage Battery in Implantable Medical Systems. IEEE Trans. Ind. Electron. 66(11): 8860-8865 (2019) - 2017
- [c2]Ji-Hun Lee, Jun-Suk Bang, Kiduk Kim, Hui-Dong Gwon, Sang-Hui Park, Yeunhee Huh, Kye-Seok Yoon, Jong-Beom Baek, Yong-Min Ju, Gibbeum Lee, Homin Park, Hyeon-Min Bae, Gyu-Hyeong Cho:
5.2 An 8Ω 10W 91%-power-efficiency 0.0023%-THD+N multi-level Class-D audio amplifier with folded PWM. ISSCC 2017: 88-89 - 2014
- [j1]Young-sub Yuk, Seungchul Jung, Chul Kim, Hui-Dong Gwon, Sukhwan Choi, Gyu-Hyeong Cho:
PSR Enhancement Through Super Gain Boosting and Differential Feed-Forward Noise Cancellation in a 65-nm CMOS LDO Regulator. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2181-2191 (2014) - [c1]Young-Sub Yuk, Seungchul Jung, Hui-Dong Gwon, Sukhwan Choi, Si-Duk Sung, Tae-Hwang Kong, Sung-Wan Hong, Jun-Han Choi, Min-Yong Jeong, Jong-Pil Im, Seung-Tak Ryu, Gyu-Hyeong Cho:
23.5 An energy pile-up resonance circuit extracting maximum 422% energy from piezoelectric material in a dual-source energy-harvesting interface. ISSCC 2014: 402-403
Coauthor Index
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