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Tetsuro Matsumoto
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Journal Articles
- 2007
- [j8]Hiromi Kashiwaya, Tetsuro Matsumoto, Hajime Shibata
, Kiyoe Tani, Satoshi Kashiwaya:
Measurement System for Switching Current Distribution in Intrinsic Josephson Junctions. IEICE Trans. Electron. 90-C(3): 605-606 (2007) - 1991
- [j7]Masashi Horiguchi, Jun Etoh, Masakazu Aoki, Kiyoo Itoh, Tetsuro Matsumoto:
A flexible redundancy technique for high-density DRAMs. IEEE J. Solid State Circuits 26(1): 12-17 (1991) - [j6]Masashi Horiguchi, Masakazu Aoki, Jun Etoh, Gyoo Itoh, Kazuhiko Kajigaya, Atsushi Nozoe, Tetsuro Matsumoto:
Dual-regulator dual-decoding-trimmer DRAM voltage limiter for burn-in test. IEEE J. Solid State Circuits 26(11): 1544-1549 (1991) - 1990
- [j5]Goro Kitsukawa, Kazumasa Yanagisawa, Yutaka Kobayashi, Yoshitaka Kinoshita, Tatsuyuki Ohta, Tetsu Udagawa, Hitoshi Miwa, Hiroyuki Miyazawa, Yoshiki Kawajiri, Yoshiaki Ouchi, Hiromi Tsukada, Tetsuro Matsumoto, Kiyoo Itoh:
A 23-ns 1-Mb BiCMOS DRAM. IEEE J. Solid State Circuits 25(5): 1102-1111 (1990) - [j4]Masashi Horiguchi, Masakazu Aoki, Jun Etoh, Hitoshi Tanaka, Shin'ichi Ikenaga, Kiyoo Itoh, Kazuhiko Kajigaya, Hiroaki Kotani, Kazuyoshi Ohshima, Tetsuro Matsumoto:
A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier. IEEE J. Solid State Circuits 25(5): 1129-1135 (1990) - 1989
- [j3]Goro Kitsukawa, Kiyoo Itoh, Ryoichi Hori, Yoshiki Kawajiri, Takao Watanabe, Takayuki Kawahara
, Tetsuro Matsumoto, Yutaka Kobayashi:
A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques. IEEE J. Solid State Circuits 24(3): 597-602 (1989) - [j2]Takao Watanabe, Goro Kitsukawa, Yoshiki Kawajiri, Kiyoo Itoh, Ryoichi Hori, Yoshiaki Ouchi, Takayuki Kawahara
, Tetsuro Matsumoto:
Comparison of CMOS and BiCMOS 1-Mbit DRAM performance. IEEE J. Solid State Circuits 24(3): 771-778 (1989) - [j1]Takayuki Kawahara
, Goro Kitsukawa, Hisayuki Higuchi, Yoshiki Kawajiri, Takao Watanabe, Kiyoo Itoh, Ryoichi Hori, Yutaka Kobayashi, Tetsuro Matsumoto:
Substrate current reduction techniques for BiCMOS DRAM. IEEE J. Solid State Circuits 24(5): 1381-1389 (1989)
Conference and Workshop Papers
- 2023
- [c1]Kazusa Takami, Yuibi Gomi, Shin-ichiro Abe, Wang Liao, Seiya Manabe, Tetsuro Matsumoto, Masanori Hashimoto:
Characterizing SEU Cross Sections of 12- and 28-nm SRAMs for 6.0, 8.0, and 14.8 MeV Neutrons. IRPS 2023: 1-6
Coauthor Index
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