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ORCIDSupreet Jeloka
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Journal Articles
- 2018
[j5]Qing Dong
, Supreet Jeloka, Mehdi Saligane, Yejoong Kim, Masaru Kawaminami, Akihiko Harada, Satoru Miyoshi, Makoto Yasuda, David T. Blaauw, Dennis Sylvester:
A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin. IEEE J. Solid State Circuits 53(4): 1006-1015 (2018)- 2017
- [j4]Nathaniel Ross Pinckney, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw, Lucian Shifren, Brian Cline, Saurabh Sinha:
Impact of FinFET on Near-Threshold Voltage Scalability. IEEE Des. Test 34(2): 31-38 (2017) - [j3]Xiao Wu, Yao Shi, Supreet Jeloka, Kaiyuan Yang, Inhee Lee, Yoonmyung Lee, Dennis Sylvester, David T. Blaauw:
A 20-pW Discontinuous Switched-Capacitor Energy Harvester for Smart Sensor Applications. IEEE J. Solid State Circuits 52(4): 972-984 (2017) - 2016
- [j2]Supreet Jeloka, Naveen Bharathwaj Akesh, Dennis Sylvester, David T. Blaauw:
A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory. IEEE J. Solid State Circuits 51(4): 1009-1021 (2016) - [j1]Hsing Min Chen, Supreet Jeloka, Akhil Arunkumar, David T. Blaauw, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti:
Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems. IEEE Trans. Computers 65(12): 3766-3779 (2016)
Conference and Workshop Papers
- 2022
- [c12]Supreet Jeloka, Brian Cline, Shidhartha Das, Benoit Labbe, Alejandro Rico, Rainer Herberholz, Javier A. DeLaCruz, Rahul Mathur, Shawn Hung:
System technology co-optimization and design challenges for 3D IC. CICC 2022: 1-6 - 2020
- [c11]Pranay Prabhat, Benoît Labbé, Graham Knight, Anand Savanth, Jonas Svedas, Matthew J. Walker, Supreet Jeloka, Philex Ming-Yan Fan, Fernando García-Redondo, Thanusree Achuthan, James Myers:
27.2 M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep Power. ISSCC 2020: 422-424 - 2019
- [c10]Supreet Jeloka, Pranay Prabhat, Graham Knight, James Myers:
A 65nm switched source line sub-threshold ROM using data encoding, with 0.3V Vmin and 47fJ/b access energy. ISLPED 2019: 1-6 - 2018
- [c9]Pranay Prabhat, Graham Knight, Supreet Jeloka, Sheng Yang, James Myers:
A bulk 65nm Cortex-M0+ SoC with All-Digital Forward Body Bias for 4.3X Subthreshold Speedup. A-SSCC 2018: 183-186 - [c8]Supreet Jeloka, Zhehong Wang, Ruochen Xie, Sudhanshu Khanna, Steven Bartling, Dennis Sylvester, David T. Blaauw:
Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications. VLSI Circuits 2018: 85-86 - 2017
- [c7]Shaizeen Aga, Supreet Jeloka, Arun Subramaniyan, Satish Narayanasamy, David T. Blaauw, Reetuparna Das:
Compute Caches. HPCA 2017: 481-492 - 2016
- [c6]Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability. DAC 2016: 76:1-76:6 - [c5]Xiao Wu, Yao Shi, Supreet Jeloka, Kaiyuan Yang, Inhee Lee, Dennis Sylvester, David T. Blaauw:
A 66pW discontinuous switch-capacitor energy harvester for self-sustaining sensor applications. VLSI Circuits 2016: 1-2 - 2015
- [c4]Supreet Jeloka, Naveen Akesh, Dennis Sylvester, David T. Blaauw:
A configurable TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell. VLSIC 2015: 272- - 2014
- [c3]Supriya Rao, Supreet Jeloka, Reetuparna Das, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge:
VIX: Virtual Input Crossbar for Efficient Switch Allocation. DAC 2014: 103:1-103:6 - [c2]Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge:
Quality-of-Service for a High-Radix Switch. DAC 2014: 163:1-163:6 - [c1]Supreet Jeloka, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw:
Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration. MICRO 2014: 471-483
Coauthor Index
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