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ORCIDFumihiro Kono
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2020 – today
- 2023
[c4]Mario Sako, T. Nakajima, Fumihiro Kono, T. Nakano, Masaki Fujiu, Junji Musha, Dai Nakamura, Naoaki Kanagawa, Y. Shimizu, Kosuke Yanagidaira, Tetsuaki Utsumi, T. Kawano, Yoshikazu Hosomura, Hiroki Yabe, M. Kano, Hiroshi Sugawara, A. H. Sravan, K. Hayashi, Toshiyuki Kouchi, Y. Watanabe:
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm2 bit density with 3.2Gbps interface and 205MB/s program throughput. VLSI Technology and Circuits 2023: 1-2
2010 – 2019
- 2018
- [c3]Hiroshi Maejima, Kazushige Kanda, Susumu Fujimura, Teruo Takagiwa, Susumu Ozawa, Jumpei Sato, Yoshihiko Shindo, Manabu Sato, Naoaki Kanagawa, Junji Musha, Satoshi Inoue, Katsuaki Sakurai, Naohito Morozumi, Ryo Fukuda, Yuui Shimizu, Toshifumi Hashimoto, Xu Li, Yuki Shimizu, Kenichi Abe, Tadashi Yasufuku, Takatoshi Minamoto, Hiroshi Yoshihara, Takahiro Yamashita, Kazuhiko Satou, Takahiro Sugimoto, Fumihiro Kono, Mitsuhiro Abe, Tomoharu Hashiguchi, Masatsugu Kojima, Yasuhiro Suematsu, Takahiro Shimizu, Akihiro Imamoto, Naoki Kobayashi, Makoto Miakashi, Kouichirou Yamaguchi, Sanad Bushnaq, Hicham Haibi, Masatsugu Ogawa, Yusuke Ochi, Kenro Kubota, Taichi Wakui, Dong He, Weihan Wang, Hiroe Minagawa, Tomoko Nishiuchi, Hao Nguyen, Kwang-Ho Kim, Ken Cheah, Yee Lih Koh, Feng Lu, Venky Ramachandra, Srinivas Rajendra, Steve Choi, Keyur Payak, Namas Raghunathan, Spiros Georgakis, Hiroshi Sugawara, Seungpil Lee, Takuya Futatsuyama, Koji Hosono, Noboru Shibata, Toshiki Hisada, Tetsuya Kaneko, Hiroshi Nakamura:
A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology. ISSCC 2018: 336-338 - 2016
- [j2]Mario Sako, Yoshihisa Watanabe, Takao Nakajima, Jumpei Sato, Kazuyoshi Muraoka, Masaki Fujiu, Fumihiro Kono, Michio Nakagawa, Masami Masuda, Koji Kato, Yuri Terada, Yuki Shimizu, Mitsuaki Honma, Akihiro Imamoto, Tomoko Araya, Hayato Konno, Takuya Okanaga, Tomofumi Fujimura, Xiaoqing Wang, Mai Muramoto, Masahiro Kamoshida, Masatoshi Kohno, Yoshinao Suzuki, Tomoharu Hashiguchi, Tsukasa Kobayashi, Masashi Yamaoka, Ryuji Yamashita:
A Low Power 64 Gb MLC NAND-Flash Memory in 15 nm CMOS Technology. IEEE J. Solid State Circuits 51(1): 196-203 (2016)
2000 – 2009
- 2008
- [j1]Juergen Pille, Chad Adams, Todd Christensen, Scott R. Cottier, Sebastian Ehrenreich, Fumihiro Kono, Daniel Nelson, Osamu Takahashi, Shunsako Tokito, Otto A. Torreiter, Otto Wagner, Dieter F. Wendel:
Implementation of the Cell Broadband Engine™ in 65 nm SOI Technology Featuring Dual Power Supply SRAM Arrays Supporting 6 GHz at 1.3 V. IEEE J. Solid State Circuits 43(1): 163-171 (2008) - [c2]Osamu Takahashi, Chad Adams, D. Ault, Erwin Behnen, O. Chiang, Scott R. Cottier, Paula K. Coulman, James Culp, Gilles Gervais, M. S. Gray, Y. Itaka, C. J. Johnson, Fumihiro Kono, L. Maurice, Kevin W. McCullen
, Lam Nguyen, Y. Nishino, Hiromi Noro, Jürgen Pille, Mack W. Riley, M. Shen, Chiaki Takano, Shunsako Tokito, Tina Wagner, Hiroshi Yoshihara:
Migration of Cell Broadband Engine from 65nm SOI to 45nm SOI. ISSCC 2008: 86-87 - 2007
- [c1]Jürgen Pille, Chad Adams, Todd Christensen, Scott R. Cottier, Sebastian Ehrenreich, Fumihiro Kono, Daniel Nelson, Osamu Takahashi, Shunsako Tokito, Otto A. Torreiter, Otto Wagner, Dieter F. Wendel:
Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V. ISSCC 2007: 322-606
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