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Susumu Takeda

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2010 – 2019

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2019
[c5]
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  - conf/vlsic/FujitaTTI19
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Shinobu Fujita, Satoshi Takaya, Susumu Takeda, Kazutaka Ikegami:
Circuit And Systems Based on Advanced MRAM for Near Future Computing Applications. VLSI Circuits 2019: 278-
2017
[c4]
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Shinobu Fujita, Hiroki Noguchi, Kazutaka Ikegami, Susumu Takeda, Kumiko Nomura, Keiko Abe:
Novel memory hierarchy with e-STT-MRAM for near-future applications. VLSI-DAT 2017: 1-2
2015
[c3]
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Eishi Arima, Hiroki Noguchi, Takashi Nakada, Shinobu Miwa, Susumu Takeda, Shinobu Fujita, Hiroshi Nakamura:
Immediate sleep: Reducing energy impact of peripheral circuits in STT-MRAM caches. ICCD 2015: 149-156
2014
[c2]
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Shinobu Fujita, Kumiko Nomura, Hiroki Noguchi, Susumu Takeda, Keiko Abe:
Novel nonvolatile memory hierarchies to realize "normally-off mobile processors". ASP-DAC 2014: 6-11
[c1]
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Shinobu Fujita, Hiroki Noguchi, Kazutaka Ikegami, Susumu Takeda, Kumiko Nomura, Keiko Abe:
Novel STT-MRAM-based last level caches for high performance processors using normally-off architectures. ISIC 2014: 316-319

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