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ORCIDCarlos Jesús Jiménez-Fernández
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2020 – today
- 2024
[j12]Carlos Fernández-García
, José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández:
TinyJAMBU Hardware Implementation for Low Power. IEEE Access 12: 108342-108349 (2024)- [c11]Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox:
Cryptographic Security Through a Hardware Root of Trust. ARC 2024: 106-119 - 2022
- [j11]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio J. Acosta, Carlos Jesús Jiménez-Fernández, Ricardo Chaves:
Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher. IEEE Access 10: 65548-65561 (2022) - 2021
- [j10]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández:
Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA. IEEE Access 9: 168444-168454 (2021) - [j9]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández:
Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations. Sensors 21(22): 7596 (2021) - 2020
- [j8]Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero:
An Academic Approach to FPGA Design Based on a Distance Meter Circuit. Rev. Iberoam. de Tecnol. del Aprendiz. 15(3): 123-128 (2020) - [j7]Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero, Carmen Baena Oliva, Pilar Parra Fernández, Carlos Jesús Jiménez-Fernández:
Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA. Sensors 20(23): 6909 (2020) - [j6]José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
ASIC Design and Power Characterization of Standard and Low Power Multi-Radix Trivium. IEEE Trans. Circuits Syst. 67-II(11): 2682-2686 (2020) - [c10]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Ricardo Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández:
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers. ISCAS 2020: 1-5
2010 – 2019
- 2018
- [c9]Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Manuel Valencia-Barrero:
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher. DCIS 2018: 1-6 - 2017
- [j5]José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
Trivium hardware implementations for power reduction. Int. J. Circuit Theory Appl. 45(2): 188-198 (2017) - [j4]Antonio J. Acosta, Erica Tena-Sánchez, Carlos Jesús Jiménez-Fernández, Javier M. Mora-Merchan:
Power and Energy Issues on Lightweight Cryptography. J. Low Power Electron. 13(3): 326-337 (2017) - [j3]Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
Vulnerability Analysis of Trivium FPGA Implementations. IEEE Trans. Very Large Scale Integr. Syst. 25(12): 3380-3389 (2017) - [j2]José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
Multiradix Trivium Implementations for Low-Power IoT Hardware. IEEE Trans. Very Large Scale Integr. Syst. 25(12): 3401-3405 (2017) - 2016
- [c8]Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
Fault attack on FPGA implementations of Trivium stream cipher. ISCAS 2016: 562-565 - 2013
- [j1]Piedad Brox, Javier Castro-Ramirez, Macarena C. Martínez-Rodríguez, Erica Tena, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Antonio J. Acosta:
A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(12): 3182-3194 (2013) - 2012
- [c7]José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
Low Power Implementation of Trivium Stream Cipher. PATMOS 2012: 113-120
2000 – 2009
- 2008
- [p1]Angel Barriga, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero:
Logic Synthesis. Wiley Encyclopedia of Computer Science and Engineering 2008 - 2002
- [c6]Alejandro Cabrera, Santiago Sánchez-Solano, Raouf Senhadji, Angel Barriga, Carlos Jesús Jiménez-Fernández:
Hardware/software codesign methodology for fuzzy controller implementation. FUZZ-IEEE 2002: 464-469 - [c5]Carmen Baena Oliva, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carlos Jesús Jiménez-Fernández, Manuel Valencia:
Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level. PATMOS 2002: 353-362 - [c4]Santiago Sánchez-Solano, Raouf Senhadji, Alejandro Cabrera Sarmiento, Iluminada Baturone, Carlos Jesús Jiménez-Fernández, Angel Barriga:
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards. IEEE International Workshop on Rapid System Prototyping 2002: 25-
1990 – 1999
- 1998
- [c3]E. Lago, Carlos Jesús Jiménez-Fernández, Diego R. López, Santiago Sánchez-Solano, Angel Barriga:
XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers. DATE 1998: 102-107 - [c2]Angel Barriga, Raouf Senhadji, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Santiago Sánchez-Solano:
A design methodology for application specific fuzzy integrated circuits. ICECS 1998: 431-434 - 1995
- [c1]D. Galán, Carlos Jesús Jiménez-Fernández, Angel Barriga, Santiago Sánchez-Solano:
VHDL package for description of fuzzy logic controllers. EURO-DAC 1995: 528-533
Coauthor Index
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