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2020 – today
- 2024
[c14]Daniel Yingling, Yimai Peng, Robert Vachon, Dipti Pal, Sagar Jariwala, Felipe G. Cabral, Jason Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith A. Bowman:
14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion. ISSCC 2024: 258-260
2010 – 2019
- 2017
- [p1]Santanu Sarma, Nikil D. Dutt
:
Architecture and Cross-Layer Design Space Exploration. Handbook of Hardware/Software Codesign 2017: 247-270 - 2016
- [b1]Santanu Sarma:
Cyber-Physical-System-On-Chip (CPSoC): An Exemplar Self-Aware SoC and Smart Computing Platform. University of California, Irvine, USA, 2016 - [j2]Nikil D. Dutt, Axel Jantsch, Santanu Sarma:
Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC) Perspective. ACM Trans. Embed. Comput. Syst. 15(2): 22:1-22:27 (2016) - [c13]Santanu Sarma, Tiago Mück, Majid Shoushtari, Abbas BanaiyanMofrad, Nikil D. Dutt:
Cross-layer virtual/physical sensing and actuation for resilient heterogeneous many-core SoCs. ASP-DAC 2016: 395-402 - [c12]Bryan Donyanavard, Tiago Mück, Santanu Sarma, Nikil D. Dutt:
SPARTA: runtime task allocation for energy efficient heterogeneous many-cores. CODES+ISSS 2016: 27:1-27:10 - 2015
- [c11]Tiago Mück, Santanu Sarma, Nikil D. Dutt:
Run-DMC: Runtime dynamic heterogeneous multicore performance and power estimation for energy efficiency. CODES+ISSS 2015: 173-182 - [c10]Santanu Sarma, Tiago Mück, Luis Angel D. Bathen, Nikil D. Dutt, Alexandru Nicolau:
SmartBalance: a sensing-driven linux load balancer for energy efficiency of heterogeneous MPSoCs. DAC 2015: 109:1-109:6 - [c9]Santanu Sarma, Nikil D. Dutt, Puneet Gupta, Nalini Venkatasubramanian, Alexandru Nicolau:
Cyberphysical-system-on-chip (CPSoC): a self-aware MPSoC paradigm with cross-layer virtual sensing and actuation. DATE 2015: 625-628 - [c8]Nikil D. Dutt, Axel Jantsch, Santanu Sarma:
Self-Aware Cyber-Physical Systems-on-Chip. ICCAD 2015: 46-50 - [c7]Santanu Sarma, Nikil D. Dutt:
Cross-Layer Exploration of Heterogeneous Multicore Processor Configurations. VLSID 2015: 147-152 - [i2]Santanu Sarma:
Essence: Machine Learning Approaches to Scalable and Energy Efficient Sense-making for Internet-of-Things (IoT). University of California, Irvine, USA, 2015 - 2014
- [c6]Santanu Sarma, Nikil D. Dutt, Puneet Gupta, Alexandru Nicolau, Nalini Venkatasubramanian:
On-chip self-awareness using Cyberphysical-Systems-on-Chip (CPSoC). CODES+ISSS 2014: 22:1-22:3 - [c5]Santanu Sarma, Nalini Venkatasubramanian, Nikil D. Dutt:
Sense-making from Distributed and Mobile Sensing Data: A Middleware Perspective. DAC 2014: 68:1-68:6 - [c4]Santanu Sarma, Nikil D. Dutt:
Minimal sparse observability of complex networks: Application to MPSoC sensor placement and run-time thermal estimation & tracking. DATE 2014: 1-6 - [c3]Santanu Sarma, Nikil D. Dutt:
FPGA emulation and prototyping of a cyberphysical-system-on-chip (CPSoC). RSP 2014: 121-127 - 2013
- [i1]Santanu Sarma:
Adaptive Technique for Computationally Efficient Time Delay and Magnitude Estimation of Sinusoidal Signals. CoRR abs/1308.2390 (2013) - 2012
- [c2]Santanu Sarma, Nikil D. Dutt, Nalini Venkatasubramanian:
Cross-layer virtual observers for embedded multiprocessor system-on-chip (MPSoC). ARM 2012: 4 - 2011
- [c1]Santanu Sarma, Subramanya Udupa, K. M. Bhardwaj, K. Parameswaran, N. K. Malik:
A hardware-software co-design approach to a JPEG encoder design for a planetary micro-rover application. Intelligent Robots and Computer Vision: Algorithms and Techniques 2011: 78780X
2000 – 2009
- 2008
- [j1]Santanu Sarma, V. K. Agrawal, Subramanya Udupa:
Software-Based Resolver-to-Digital Conversion Using a DSP. IEEE Trans. Ind. Electron. 55(1): 371-379 (2008)
Coauthor Index
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