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ORCIDGraham R. Hellestrand
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2010 – 2019
- 2013
[c16]Graham R. Hellestrand:
Engineering safe autonomous mobile systems of systems using specification (model) based systems architecture & engineering. SysCon 2013: 599-605- 2010
- [j5]Ahmed Abdallah, Eric M. Feron, Graham R. Hellestrand, Philip J. Koopman Jr., Marilyn Wolf:
Hardware/Software Codesign of Aerospace and Automotive Systems. Proc. IEEE 98(4): 584-602 (2010)
2000 – 2009
- 2008
- [c15]Ahmed Abdallah, Wayne H. Wolf, Graham R. Hellestrand:
Using Empirical Science to Engineer Systems: Optimizing Cache for Power and Performance. DSD 2008: 325-333 - [c14]Ahmed Abdallah, Wayne H. Wolf, Graham R. Hellestrand:
Statistical characterization of execution time through simulation. WISES 2008: 1-13 - 2005
- [j4]Graham R. Hellestrand:
The Engineering of Supersystems. Computer 38(1): 103-105 (2005) - [c13]Graham R. Hellestrand:
Systems architecture: the empirical way: abstract architectures to 'optimal' systems. EMSOFT 2005: 147-158
1990 – 1999
- 1999
- [c12]Graham R. Hellestrand:
Designing system on a chip products using systems engineering tools. ISCAS (6) 1999: 468-473 - 1997
- [c11]Tommy King-Yin Cheung, Graham R. Hellestrand, Prasert Kanthamanon:
A transformational codesign methodology. ASP-DAC 1997: 299-305 - [c10]Radhakrishna Nagalla, Graham R. Hellestrand:
A Visual Approach for Asynchronous Circuit Synthesis. VLSI Design 1997: 329-335 - 1996
- [c9]Tommy King-Yin Cheung, Graham R. Hellestrand, Prasert Kanthamanon:
A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study. CODES 1996: 10-17 - [c8]Radhakrishna Nagalla, Graham R. Hellestrand:
Elimination of Dynamic Hazards from Signal Transition Graphs. VLSI Design 1996: 382-388 - 1995
- [j3]Michael C. Doggett, Graham R. Hellestrand:
A hardware architecture for video rate smooth shading of volume data. Comput. Graph. 19(5): 695-704 (1995) - [c7]Morteza Saheb Zamani, Graham R. Hellestrand:
A neural network approach to the placement problem. ASP-DAC 1995 - [c6]Morteza Saheb Zamani, Graham R. Hellestrand:
Placement with self-organising neural networks. ICNN 1995: 2185-2189 - [c5]Morteza Saheb Zamani, Graham R. Hellestrand:
A Stepwise Refinement Algorithm for Integrated Floorplanning, Placement and Routing of Hierarchical Designs. ISCAS 1995: 49-52 - [c4]Michael C. Doggett, Graham R. Hellestrand:
A Hardware Architecture for Video Rate Shading of Volume Data. ISCAS 1995: 433-436 - [c3]Morteza Saheb Zamani, Graham R. Hellestrand:
A New Neural Network Approach to the Floorplanning of Hierarchical VLSI Designs. IWANN 1995: 1128-1134 - 1994
- [j2]Radhakrishna Nagalla, Graham R. Hellestrand:
Signal Transition Graph Constraints for Synthesis of Hazard-Free Asynchronous Circuits with Unbounded-Gate Delays. Formal Methods Syst. Des. 5(3): 245-273 (1994) - [c2]Michael C. Doggett, Graham R. Hellestrand:
A hardware architecture for video rate smooth shading of Volume data. Workshop on Graphics Hardware 1994: 95-102 - [c1]Mehdi N. Fesharaki, Graham R. Hellestrand:
A Real-Time Edge Detection ASIC Design. ISCAS 1994: 81-84 - 1991
- [j1]Mark A. Bickerstaff, Graham R. Hellestrand:
A highly parallel architecture for real time collision detection in flight simulation. Comput. Graph. 15(3): 355-363 (1991)
Coauthor Index
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