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Mohit Sharma 0003

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affiliation: Xilinx Hyderabad, Hyderabad, India
affiliation (former): Indian Institute of Technology, Roorkee, Uttarakhand, India

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2010 – 2019

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2017
[c3]
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Satish Maheshwaram, Om. Prakash, Mohit Sharma, Anand Bulusu, Sanjeev Manhas:
Vertical Nanowire FET Based Standard Cell Design Employing Verilog-A Compact Model for Higher Performance. VDAT 2017: 239-248
2016
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Om. Prakash, Mohit Sharma, Anand Bulusu, A. K. Saxena, S. K. Manhas, Satish Maheshwaram:
Lateral silicon nanowire based standard cell design for higher performance. APCCAS 2016: 135-138
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Om. Prakash, Satish Maheshwaram, Mohit Sharma, Anand Bulusu, A. K. Saxena, S. K. Manhas:
A unified Verilog-A compact model for lateral Si nanowire (NW) FET incorporating parasitics for circuit simulation. VDAT 2016: 1-6

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