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ORCIDJournal of Signal Processing Systems, Volume 66
Volume 66, Number 1, January 2012
- Myung Hoon Sunwoo:
Guest Editorial - Special Issue on Signal Processing Circuits and Systems for Broadband Communications. 1-2 - Xinmiao Zhang, Jiangli Zhu, Wei Zhang:
Modified Low-Complexity Chase Soft-Decision Decoder of Reed-Solomon Codes. 3-13 - Jae Do Lee, Myung Hoon Sunwoo:
Three-Parallel Reed-Solomon Decoder Using S-DCME for High-Speed Communications. 15-24 - Rizwan Asghar, Di Wu, Ali Saeed, Yulin Huang, Dake Liu:
Implementation of a Radix-4, Parallel Turbo Decoder and Enabling the Multi-Standard Support. 25-41 - Kihoon Lee, Han-Gil Kang, Jeong-In Park, Hanho Lee:
A High-Speed Low-Complexity Concatenated BCH Decoder Architecture for 100 Gb/s Optical Communications. 43-55 - Ching-Te Chiu, Yu-Hao Hsu, Jen-Ming Wu, Shuo-Hung Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ming-Chang Du, Ping-Ling Yang, Ming-Hao Lu, Fanta Chen, Hung-Yu Lin, Yarsun Hsu:
An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking. 57-73 - Jinho Choi
, Jeongseok Ha:
On the Achievable Rate for Wideband Channels with Estimated CSI. 75-86
Volume 66, Number 2, February 2012
- Chua-Chin Wang, Chia-Hao Hsu, Gang-Neng Sung, Yu-Cheng Lu:
A Signed Array Multiplier with Bypassing Logic. 87-92 - Yun-Parn Thomas Lee:
System Comparison of Electronic and Optical Correlator. 93-98 - Fabian Angarita, Trinidad Sansaloni, María José Canet, Javier Valls:
Improved Sliced Message Passing Architecture for High Throughput Decoding of LDPC Codes. 99-104 - Chi-Sing Leung, Ping-Man Lam, Peter Wai-Ming Tsang, Wuchao Situ:
A Graphics Processing Unit Accelerated Genetic Algorithm for Affine Invariant Matching of Broken Contours. 105-111 - Anissa Mokraoui, Vianney Muñoz-Jiménez, Jean Pierre Astruc:
Motion Estimation Based on Spline Interpolation in H.264/AVC Video Coder for Videoconferencing Application: Performance Versus Computation Load. 113-119 - Yu-Ming Lee, Yinyi Lin:
Asymptotic Computation in Mode Decision for H.264/AVC Inter Frame Coding. 121-127 - Erdal Oruklu, Xin Xiao, Jafar Saniie:
Reduced Memory and Low Power Architectures for CORDIC-based FFT Processors. 129-134 - Lin Wang, Fuliang Yin, Zhe Chen:
An Improved Floating-to-Fixed-Point Conversion Scheme for DCT Quantization Algorithm. 135-139 - Jeich Mar, Chi-Cheng Kuo, Shih-Hao Chou:
FPGA Implementation of SDR Based CFO Estimation and Compensation Circuit for OFDM System. 141-146 - Juan Antonio Gómez Pulido, Miguel A. Vega-Rodríguez, Juan Manuel Sánchez-Pérez:
High-Speed Reconfigurable Parallel System to Design Good Error Correcting Codes in Communications. 147-152 - Mariano Fons, Francisco Fons, Enrique Cantó, Mariano López:
FPGA-based Personal Authentication Using Fingerprints. 153-189 - Francisco Fons, Mariano Fons, Enrique Cantó, Mariano López:
Deployment of Run-Time Reconfigurable Hardware Coprocessors Into Compute-Intensive Embedded Applications. 191-221
Volume 66, Number 3, March 2012
- Shuvra S. Bhattacharyya, Wonyong Sung, Jarmo Takala:
Guest Editors' Introduction. 223-224 - Rakan Khraisha, Jooheung Lee:
A Bit-Rate Aware Scalable H.264/AVC Deblocking Filter Using Dynamic Partial Reconfiguration. 225-234 - Kisun You, Jungwook Choi, Wonyong Sung:
Flexible and Expandable Speech Recognition Hardware with Weighted Finite State Transducers. 235-244 - Jiangli Zhu, Xinmiao Zhang:
Efficient Generalized Minimum-distance Decoders of Reed-Solomon Codes. 245-257 - Aditya Chopra, Brian L. Evans:
Design of Sparse Filters for Channel Shortening. 259-272 - Fei Ren, Yahong Rosa Zheng:
Hardware Emulation of Wideband Correlated Multiple-Input Multiple-Output Fading Channels. 273-284 - Hojin Kee, Chung-Ching Shen, Shuvra S. Bhattacharyya, Ian C. Wong, Yong Rao, Jacob Kornerup:
Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware. 285-301
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