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IPSJ Transactions on System LSI Design Methodology, Volume 10
Volume 10, February 2017
- Nozomu Togawa:
Message from the Editor-in-Chief. 1
- Xiaoqing Xu, David Z. Pan:
Toward Unidirectional Routing Closure in Advanced Technology Nodes. 2-12
- Farhan Shafiq, Tsuyoshi Isshiki, Dongju Li:
An Accurate and Fast Trace-aware Performance Estimation Model For Prioritized MPSoC Bus With Multiple Interfering Bus-Masters. 13-27 - Ahmed Awad, Atsushi Takahashi, Satoshi Tanaka, Chikaaki Kodama:
Intensity Difference Map (IDM) Accuracy Analysis for OPC Efficiency Verification and Further Enhancement. 28-38 - Yusuke Matsunaga:
An Accelerating Technique for SAT-based ATPG. 39-44
- Johann Knechtel, Ozgur Sinanoglu, Ibrahim Abe M. Elfadel, Jens Lienig, Cliff C. N. Sze:
Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration. 45-62
- Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi:
Towards Open-HW: A Platform to Design, Share and Deploy FPGA Accelerators in Low Cost. 63-70
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