default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDVLSI-SoC 2019: Cusco, Peru - Selected Papers
- Carolina Metzler
, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Carlos Silva Cárdenas, Ricardo Reis:
VLSI-SoC: New Technology Enabler - 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 586, Springer 2020, ISBN 978-3-030-53272-7 - Michelangelo Grosso, Matteo Sonza Reorda, Salvatore Rinaudo:
Software-Based Self-Test for Delay Faults. 1-19 - Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik:
On Test Generation for Microprocessors for Extended Class of Functional Faults. 21-44 - Leonardo B. Moraes, Alexandra Lackmann Zimpeck, Cristina Meinhardt, Ricardo A. L. Reis:
Robust FinFET Schmitt Trigger Designs for Low Power Applications. 45-68 - Rafael B. Schvittz, Denis Teixeira Franco, Leomar S. da Rosa, Paulo F. Butzen:
An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults. 69-88 - Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Process Variability Impact on the SET Response of FinFET Multi-level Design. 89-113 - Vitor V. Bandeira, Felipe Rosa, Ricardo Reis, Luciano Ost:
Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques. 115-137 - Atishay, Ankit Gupta, Rashmi Sonawat, Helik Kanti Thacker, Prasanth B:
A Statistical Wafer Scale Error and Redundancy Analysis Simulator. 139-163 - Solon Falas, Charalambos Konstantinou, Maria K. Michael:
Hardware-Enabled Secure Firmware Updates in Embedded Systems. 165-185 - Longfei Wang, Soner Seçkiner, Selçuk Köse:
Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance. 187-208 - Bruno Forlin, Cezar Reinbrecht, Johanna Sepúlveda:
Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs. 209-233 - László Szilágyi, Jan Plíva, Ronny Henker:
Offset-Compensation Systems for Multi-Gbit/s Optical Receivers. 235-255 - João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon:
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. 257-278 - Y. Serhan Gener, Furkan Aydin, Sezer Gören, H. Fatih Ugurdag:
Semi- and Fully-Random Access LUTs for Smooth Functions. 279-306 - Patsy Cadareanu, Ganesh Gore, Edouard Giacomin, Pierre-Emmanuel Gaillardon:
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. 307-322 - Chen-Ying Hsieh, Ardalan Amiri Sani, Nikil D. Dutt:
Exploiting Heterogeneous Mobile Architectures Through a Unified Runtime Framework. 323-344
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-08 20:39 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
