• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 35 matches

• 2011
• 
  Prashant Aggarwal, Darrow Chu, Vijay Kadamby, Vigyan Singhal:
  Planning for end-to-end formal using simulation-based coverage: invited tutorial. FMCAD 2011: 9-16
• 
  Mohamed Abdul Basith, Tariq B. Ahmad, André Rossi, Maciej J. Ciesielski:
  Algebraic approach to arithmetic design verification. FMCAD 2011: 67-71
• 
  Anton Belov, João Marques-Silva:
  Accelerating MUS extraction with recursive model rotation. FMCAD 2011: 37-40
• 
  Brad D. Bingham, Mark R. Greenstreet, Jesse D. Bingham:
  Parameterized verification of deadlock freedom in symmetric cache coherence protocols. FMCAD 2011: 186-195
• 
  Aaron R. Bradley, Fabio Somenzi, Zyad Hassan, Yan Zhang:
  An incremental approach to model checking progress properties. FMCAD 2011: 144-153
• 
  Bryan A. Brady, Randal E. Bryant, Sanjit A. Seshia:
  Learning conditional abstractions. FMCAD 2011: 116-124
• 
  Michael L. Case, Jason Baumgartner, Hari Mony, Robert Kanzelman:
  Optimal redundancy removal without fixedpoint computation. FMCAD 2011: 101-108
• 
  Michael L. Case, Jason Baumgartner, Hari Mony, Robert Kanzelman:
  Approximate reachability with combined symbolic and ternary simulation. FMCAD 2011: 109-115
• 
  Sagar Chaki, Arie Gurfinkel, Ofer Strichman:
  Time-bounded analysis of real-time systems. FMCAD 2011: 72-80
• 
  Harsh Raju Chamarthi, Panagiotis Manolios:
  Automated specification analysis using an interactive theorem prover. FMCAD 2011: 46-53
• 
  Hana Chockler, Alexander Ivrii, Arie Matsliah, Shiri Moran, Ziv Nevo:
  Incremental formal verification of hardware. FMCAD 2011: 135-143
• 
  Alessandro Cimatti, Sergio Mover, Stefano Tonetta:
  Proving and explaining the unfeasibility of message sequence charts for hybrid systems. FMCAD 2011: 54-62
• 
  Niklas Eén, Alan Mishchenko, Robert K. Brayton:
  Efficient implementation of property directed reachability. FMCAD 2011: 125-134
• 
  Steven M. German:
  A theory of abstraction for arrays. FMCAD 2011: 176-185
• 
  Alberto Griggio:
  Effective word-level interpolation for software verification. FMCAD 2011: 28-36
• 
  Aarti Gupta:
  Verifying concurrent programs: tutorial talk. FMCAD 2011: 1
• 
  John Havlicek, Scott Little:
  Realtime regular expressions for analog and mixed-signal assertions. FMCAD 2011: 155-162
• 
  John Hughes:
  Specification based testing with QuickCheck: tutorial talk. FMCAD 2011: 17
• 
  Robert Könighofer, Roderick Bloem:
  Automated error localization and correction for imperative programs. FMCAD 2011: 91-100
• 
  Jonathan Kotker, Dorsa Sadigh, Sanjit A. Seshia:
  Timing analysis of interrupt-driven programs under context bounds. FMCAD 2011: 81-90
• 
  Jayanand Asok Kumar, Lingyi Liu, Shobha Vasudevan:
  Scaling probabilistic timing verification of hardware using abstractions in design source code. FMCAD 2011: 196-205
• 
  Louis Mandel, Florence Plateau, Marc Pouzet:
  Static scheduling of latency insensitive designs with Lucy-n. FMCAD 2011: 171-175
• 
  Panagiotis Manolios, Vasilis Papavasileiou:
  Pseudo-Boolean Solving by incremental translation to SAT. FMCAD 2011: 41-45
• 
  Kenneth L. McMillan:
  Interpolants from Z3 proofs. FMCAD 2011: 19-27
• 
  J Strother Moore:
  The role of human creativity in mechanized verification: invited talk. FMCAD 2011: 18
• 
  Lee Pike:
  Pervasive formal verification in control system design. FMCAD 2011: 206
• 
  Jun Sawada, Peter Sandon, Viresh Paruthi, Jason Baumgartner, Michael L. Case, Hari Mony:
  Hybrid verification of a hardware modular reduction engine. FMCAD 2011: 207-214
• 
  Umair Siddique, Osman Hasan:
  Formal analysis of fractional order systems in HOL. FMCAD 2011: 163-170
• 
  Fabio Somenzi, Aaron R. Bradley:
  IC3: where monolithic and incremental meet. FMCAD 2011: 3-8
• 
  Sudarshan K. Srinivasan, Raj S. Katti:
  Desynchronization: design for verification. FMCAD 2011: 215-222

skipping 5 more matches