• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 18 matches

• 2014
• 
  Salomon Beer, Marco Cannizzaro, Jordi Cortadella, Ran Ginosar, Luciano Lavagno:
  Metastability in Better-Than-Worst-Case Designs. ASYNC 2014: 101-102
• 
  Graham M. Birtwistle, Kenneth S. Stevens:
  Modelling Mixed 4phase Pipelines: Structures and Patterns. ASYNC 2014: 27-36
• 
  Fu-Chiung Cheng, Yuan-Feng Chen, Shu-Chuan Huang, Ching-Yang Huang:
  Synthesis of QDI FSMs from Synchronous Specifications. ASYNC 2014: 61-68
• 
  Mike Davies, Andrew Lines, Jon Dama, Alain Gravel, Robert Southworth, Georgios D. Dimou, Peter A. Beerel:
  A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design. ASYNC 2014: 103-104
• 
  Evangelia Kasapaki, Jens Sparsø:
  Argo: A Time-Elastic Time-Division-Multiplexed NOC Using Asynchronous Routers. ASYNC 2014: 45-52
• 
  Joycee Mekie:
  Effect of Dynamic Frequency Scaling on Interface Design for Rationally-Related Multi-clocked Systems. ASYNC 2014: 37-44
• 
  Matheus Trevisan Moreira, Michel Evandro Arendt, Ricardo Aquino Guazzelli, Ney Laert Vilar Calazans:
  A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design. ASYNC 2014: 93-100
• 
  Matheus T. Moreira, Augusto Neutzling, Mayler G. A. Martins, André Inácio Reis, Renato P. Ribas, Ney Calazans:
  Semi-custom NCL Design with Commercial EDA Frameworks: Is it Possible? ASYNC 2014: 53-60
• 
  Mehrdad Najibi, Peter A. Beerel:
  Integrated Fanout Optimization and Slack Matching of Asynchronous Circuits. ASYNC 2014: 69-76
• 
  Naoya Onizawa, Shoun Matsunaga, Takahiro Hanyu:
  A Compact Soft-Error Tolerant Asynchronous TCAM Based on a Transistor/Magnetic-Tunnel-Junction Hybrid Dual-Rail Word Structure. ASYNC 2014: 1-8
• 
  Marc Renaudin, Aurélien Buhrig, Charles Guillemet, Robin Wilson, Sylvain Engels:
  Clockless Design Performance Monitoring for Nanometer Technologies. ASYNC 2014: 108-109
• 
  Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel:
  Reconditioning: Automatic Power Optimization of QDI Circuits. ASYNC 2014: 77-84
• 
  Arash Saifhashemi, Dylan Hand, Peter A. Beerel, William Koven, Hong Wang:
  Performance and Area Optimization of a Bundled-Data Intel Processor through Resynthesis. ASYNC 2014: 110-111
• 
  Danil Sokolov, Alex Yakovlev:
  GALS Partitioning by Behavioural Decoupling Expressed in Petri Nets. ASYNC 2014: 17-26
• 
  Benjamin Z. Tang, Sunil A. Bhave, Rajit Manohar:
  Low Power Asynchronous VLSI with NEM Relays. ASYNC 2014: 85-92
• 
  Gang Wang, Xu Wang, Xinke Chen, Shuangbai Xue:
  Test and Repair Flow for Shared BISR in Asynchronous Multi-processors. ASYNC 2014: 105-107
• 
  Guangda Zhang, Wei Song, Jim D. Garside, Javier Navaridas, Zhiying Wang:
  An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults. ASYNC 2014: 9-16
• 
  20th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2014, Potsdam, Germany, May 12-14, 2014. IEEE Computer Society 2014, ISBN 978-1-4799-3789-9 [contents]