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Publication search results
found 24 matches
- 2001
- Bill Athas:
Asynchronous Design and the Pursuit of Low Power. ASYNC 2001: 2- - W. J. Bainbridge, Stephen B. Furber
:
Delay Insensitive System-on-Chip Interconnect using 1-of-4 Data Encoding. ASYNC 2001: 118-126 - Robert Berks, Radu Negulescu:
Partial-Order Correctness-Preserving Properties of Delay-Insensitive Circuits. ASYNC 2001: 74- - William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland:
FLEETzero: An Asynchronous Switching Experiment. ASYNC 2001: 173- - Gianluca Cornetta
, Jordi Cortadella
:
A Multi-Radix Approach to Asynchronous Division. ASYNC 2001: 25- - Jo C. Ebergen:
Squaring the FIFO in GasP. ASYNC 2001: 194-205 - Mark R. Greenstreet, Brian de Alwis:
How to Achieve Worst-Case Performance. ASYNC 2001: 206- - Daranee Hormdee, Jim D. Garside
:
AMULET3i Cache Architecture. ASYNC 2001: 152-161 - Joep L. W. Kessels, Ad M. G. Peeters, Torsten Kramer, Markus Feuser, Klaus Ully:
Designing an Asynchronous Bus Interface. ASYNC 2001: 108-117 - Ajay Koche:
Testing Asynchronous Circuits: Help is on the Way! ASYNC 2001: 218- - Ryusuke Konishi, Hideyuki Ito, Hiroshi Nakada, Akira Nagoya, Norbert Imlig, Tsunemichi Shiozawa, Minoru Inamori, Kouichi Nagami, Kiyoshi Oguri:
PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. ASYNC 2001: 54- - Mike J. G. Lewis, L. E. M. Brackenbury:
Exploiting Typical DSP Data Access Patterns and Asynchrony for a Low Power Multiported Register Bank. ASYNC 2001: 4-14 - David W. Lloyd, Jim D. Garside
:
A Practical Comparison of Asynchronous Design Styles. ASYNC 2001: 36-45 - Rajit Manohar:
An Analysis of Reshuffled Handshaking Expansions. ASYNC 2001: 96- - Chris J. Myers
, Hans M. Jacobson:
Efficient Exact Two-Level Hazard-Free Logic Minimization. ASYNC 2001: 64-73 - Kevin Normoyle:
Where are the Async Millionaires? ASYNC 2001: 138- - Motokazu Ozawa, Masashi Imai, Hiroshi Nakamura
, Takashi Nanya, Yoichiro Ueno:
Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors. ASYNC 2001: 162-172 - Ad M. G. Peeters, Kees van Berkel:
Synchronous Handshake Circuits. ASYNC 2001: 86-95 - Peter A. Riocreux, L. E. M. Brackenbury, J. Mike Cumpstey, Stephen B. Furber
:
A Low-Power Self-Timed Viterbi Decoder. ASYNC 2001: 15-24 - Ivan E. Sutherland, Scott Fairbanks:
GasP: A Minimal FIFO Control. ASYNC 2001: 46-53 - Ivan E. Sutherland, Jon K. Lexau:
Designing Fast Asynchronous Circuits. ASYNC 2001: 184-193 - Tony Werner, Venkatesh Akella:
An Asynchronous Superscalar Architecture for Exploiting Instruction-Level Parallelism. ASYNC 2001: 140-151 - Alexandre Yakovlev
, Fei Xia, Delong Shang:
Synthesis and Implementation of a Signal-Type Asynchronous Data Communication Mechanism. ASYNC 2001: 127- - 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 11-14 March 2001, Salt Lake City, UT, USA. IEEE Computer Society 2001, ISBN 0-7695-1034-5 [contents]
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retrieved on 2024-08-02 00:30 CEST from data curated by the dblp team
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