- Jun Ma, Jun Liu, Yang Xu:
A Method of Uncertainty Reasoning by Using Information. ISMVL 2001: 373-378 - Hajime Machida, Masahiro Miyakawa, Ivo G. Rosenberg:
Relations between Clones and Full Monoids. ISMVL 2001: 279-286 - C. Morgan:
Many Valued Paraconsistent Logic. ISMVL 2001: 267-272 - Masanori Natsui, Takafumi Aoki, Tatsuo Higuchi:
Synthesis of Multiple-Valued Arithmetic Circuits Using Evolutionary Graph Generation. ISMVL 2001: 253-258 - Jochen Pfalzgraf:
On Logical Fiberings and Decomposition of Many-Valued Operations: A Brief Survey. ISMVL 2001: 273-278 - Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl Goser, Rainer Duschl, K. Eberl, O. Schmidt:
Tunnelling Diode Technology. ISMVL 2001: 49-60 - Anna Maria Radzikowska
, Etienne E. Kerre:
On Some Classes of Fuzzy Information Relations. ISMVL 2001: 75-80 - Tsutomu Sasao:
Compact SOP Representations for Multiple-Output Functions: An Encoding Method Using Multiple-Valued Logic. ISMVL 2001: 207-212 - Frank Schmiedle, Wolfgang Günther, Rolf Drechsler:
Selection of Efficient Re-Ordering Heuristics for MDD Construction. ISMVL 2001: 299-304 - S. Selezneva:
Polynomial-Time Algorithms for Verification of Some Properties of k-Valued Functions Represented by Polynomials. ISMVL 2001: 233-240 - Dan A. Simovici, Szymon Jaroszewicz:
An Axiomatization of Generalized Entropy of Partitions. ISMVL 2001: 259-266 - Viorica Sofronie-Stokkermans:
Representation Theorems and the Semantics of (Semi)Lattice-Based Logics. ISMVL 2001: 125-136 - Zbigniew Stachniak:
Exploiting Polarity in Multiple-Valued Inference Systems. ISMVL 2001: 149-158 - Radomir S. Stankovic, Milena Stankovic, Jaakko Astola, Karen O. Egiazarian:
Bit-Level and Word-Level Polynomial Expressions for Functions in Fibonacci Interconnection Topologies. ISMVL 2001: 305-310 - Radomir S. Stankovic, Milena Stankovic, Claudio Moraga:
Design of Haar Wavelet Transforms and Haar Spectral Transform Decision Diagrams for Multiple-Valued Functions. ISMVL 2001: 311-318 - Hisayuki Tatsumi, Yasuyuki Murai, Shinji Tokumasu:
Logics Circuit Diagnosis by Using Neural Networks. ISMVL 2001: 345-350 - H. Teng, R. Bolton:
The Use of Arithmetic Operators in a Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Architecture. ISMVL 2001: 100-108 - Helmut Thiele:
On axiomatic characterisations of fuzzy approximation operators II. The rough fuzzy set based case. ISMVL 2001: 330-338 - Anna M. Tomaszewska, Piotr Dziurzanski, Svetlana N. Yanushkevich, Vlad P. Shmerko:
Two-Stage Exact Detection of Symmetrics. ISMVL 2001: 213-220 - Tetsuya Uemura, Toshio Baba:
A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors. ISMVL 2001: 89-93 - Takao Waho, Kazufumi Hattori, Y. Takamatsu:
Flash Analog-to-Digital Converter Using Resonant-Tunneling Multiple-Valued Circuits. ISMVL 2001: 94-99 - 31st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2001, Warsaw, Poland, May 22-24, 2001, Proceedings. IEEE Computer Society 2001, ISBN 0-7695-1083-3 [contents]
