- Xiaoling Sun, Wes Tutak:
Error Identification and Data Recovery in MISR-based Data Compaction. DFT 1997: 252-260 - Itsuo Takanami, Tadayoshi Horita:
Self-reconstruction of mesh-arrays with 1 1/2 -track switches by digital neural circuits. DFT 1997: 218-226 - Nobuo Tsuda:
Fault-Tolerant Hierarchical Interconnection Networks Constructed by Additional Bypass Linking with Graph-Node Coloring. DFT 1997: 227-233 - Alvernon Walker, Algernon P. Henry, Parag K. Lala:
An approach for detecting bridging faults in CMOS domino logic circuits using dynamic power supply current monitoring. DFT 1997: 272-280 - X. Wendling, H. Chauvet, Lionel Revéret, Raphaël Rochet, Régis Leveugle:
Automatic and Optimized Synthesis of Dataparts with Fault Detection or Tolerance Capabilities. DFT 1997: 195-203 - Allan Y. Wong:
A Statistical Approach To Identify Semiconductor Process Equipment Related Yield Problems. DFT 1997: 69-75 - 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 20-22 October 1997, Paris, France. IEEE Computer Society 1997, ISBN 0-8186-8168-3 [contents]
