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@article{DBLP:journals/integration/AartsBHL86,
  author       = {Emile H. L. Aarts and
                  Frans M. J. de Bont and
                  Erik H. A. Habers and
                  Peter J. M. van Laarhoven},
  title        = {Parallel implementations of the statistical cooling algorithm},
  journal      = {Integr.},
  volume       = {4},
  number       = {3},
  pages        = {209--238},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90002-7},
  doi          = {10.1016/0167-9260(86)90002-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/AartsBHL86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/BalamutKW86,
  author       = {Morris Balamut and
                  Ed Kinnen and
                  Rosanne Wyleczuk},
  title        = {{SPICE} Rack - the newsletter of the {SPICE} users group : Volume
                  4, number 1, fall 1985},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {35--41},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90035-0},
  doi          = {10.1016/0167-9260(86)90035-0},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/BalamutKW86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Bayoumi86,
  author       = {Magdy A. Bayoumi},
  title        = {Lower bounds for {VLSI} implementation of residue number system architectures},
  journal      = {Integr.},
  volume       = {4},
  number       = {3},
  pages        = {263--269},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90004-0},
  doi          = {10.1016/0167-9260(86)90004-0},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Bayoumi86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Bergman86,
  author       = {M. Bergman},
  title        = {"Introduction to nMOS and cMOS {VLSI} Systems Design" by Amar Mukherjee,
                  from: Prentice-Hall, Englewood Cliffs, {NJ} 07632, {U.S.A.}},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {195--196},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80011-6},
  doi          = {10.1016/S0167-9260(86)80011-6},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Bergman86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/BrofferioT86,
  author       = {Sergio Cesare Brofferio and
                  Michele Taliercio},
  title        = {{PLA} implementation of a differential predictive coder for digital
                  television signals},
  journal      = {Integr.},
  volume       = {4},
  number       = {4},
  pages        = {331--343},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90013-1},
  doi          = {10.1016/0167-9260(86)90013-1},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/BrofferioT86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/CardPM86,
  author       = {Howard C. Card and
                  Werner Pries and
                  Robert D. McLeod},
  title        = {Contributions to {VLSI} computational complexity theory from bounds
                  on current density},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {175--183},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80006-2},
  doi          = {10.1016/S0167-9260(86)80006-2},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/CardPM86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Char86,
  author       = {Bruce W. Char},
  title        = {Computer algebra and logic programming},
  journal      = {Integr.},
  volume       = {4},
  number       = {3},
  pages        = {271--274},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90005-2},
  doi          = {10.1016/0167-9260(86)90005-2},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/integration/Char86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/ChenLWC86,
  author       = {L. G. Chen and
                  Jau{-}Yien Lee and
                  Jhing{-}Fa Wang and
                  K. T. Chen},
  title        = {Fast execution for circuit consistency verification},
  journal      = {Integr.},
  volume       = {4},
  number       = {3},
  pages        = {239--262},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90003-9},
  doi          = {10.1016/0167-9260(86)90003-9},
  timestamp    = {Tue, 07 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/integration/ChenLWC86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/ChowdhuryB86,
  author       = {Salim U. Chowdhury and
                  Melvin A. Breuer},
  title        = {An O(n) algorithm for width determination of power/ground routes for
                  {VLSI} circuits},
  journal      = {Integr.},
  volume       = {4},
  number       = {4},
  pages        = {345--355},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90014-3},
  doi          = {10.1016/0167-9260(86)90014-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/ChowdhuryB86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Chu86,
  author       = {Tam{-}Anh Chu},
  title        = {On the models for designing {VLSI} asynchronous digital systems},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {99--113},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80002-5},
  doi          = {10.1016/S0167-9260(86)80002-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Chu86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/ClocksinL86,
  author       = {William F. Clocksin and
                  Miriam Leeser},
  title        = {Automatic determination of signal flow through {MOS} transistor networks},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {53--63},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90037-4},
  doi          = {10.1016/0167-9260(86)90037-4},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/ClocksinL86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/DijkstraP86,
  author       = {Evert Dijkstra and
                  Christian Piguet},
  title        = {On minimizing memory in systolic arrays for the dynamic time warping
                  algorithm},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {155--173},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80005-0},
  doi          = {10.1016/S0167-9260(86)80005-0},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/DijkstraP86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Groen86,
  author       = {H. Groen},
  title        = {"X/OPEN Portability Guide" by the {X/OPEN} Group, from: Elsevier SciencePublishers
                  B.V., Book Order Department, {P.O.} Box 211, 1000 {AE} Amsterdam,
                  The Netherlands},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {195},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80010-4},
  doi          = {10.1016/S0167-9260(86)80010-4},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Groen86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/HuangD86,
  author       = {J. S. T. Huang and
                  J. M. Daughton},
  title        = {Yield optimization in wafer scale circuits with hierarchical redundancies},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {43--51},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90036-2},
  doi          = {10.1016/0167-9260(86)90036-2},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/HuangD86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Lang86,
  author       = {Hans{-}Werner Lang},
  title        = {The instruction systolic array - a parallel architecture for {VLSI}},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {65--74},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90038-6},
  doi          = {10.1016/0167-9260(86)90038-6},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Lang86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/LengauerN86,
  author       = {Thomas Lengauer and
                  Stefan N{\"{a}}her},
  title        = {An analysis of ternary simulation as a tool for race detection in
                  digital {MOS} circuits},
  journal      = {Integr.},
  volume       = {4},
  number       = {4},
  pages        = {309--330},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90012-X},
  doi          = {10.1016/0167-9260(86)90012-X},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/LengauerN86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/MiyashitaAU86,
  author       = {Hiroshi Miyashita and
                  Tohru Adachi and
                  Kazuhiro Ueda},
  title        = {An automatic cell pattern generation system for {CMOS} transistor-pair
                  array {LSI}},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {115--133},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80003-7},
  doi          = {10.1016/S0167-9260(86)80003-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/MiyashitaAU86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/PetersonS86,
  author       = {John C. Peterson and
                  Kent F. Smith},
  title        = {{MASHER:} An automatic {VLSI} layout system},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {3--33},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90034-9},
  doi          = {10.1016/0167-9260(86)90034-9},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/PetersonS86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Rathmell86,
  author       = {J. G. Rathmell},
  title        = {Information flow in {VLSI} design},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {185--191},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80007-4},
  doi          = {10.1016/S0167-9260(86)80007-4},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Rathmell86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Spaanenburg86,
  author       = {Lambert Spaanenburg},
  title        = {Editorial},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {1},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90033-7},
  doi          = {10.1016/0167-9260(86)90033-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Spaanenburg86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Spaanenburg86a,
  author       = {Lambert Spaanenburg},
  title        = {Editorial},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {97},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80001-3},
  doi          = {10.1016/S0167-9260(86)80001-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Spaanenburg86a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Spaanenburg86b,
  author       = {Lambert Spaanenburg},
  title        = {Editorial},
  journal      = {Integr.},
  volume       = {4},
  number       = {4},
  pages        = {285},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90010-6},
  doi          = {10.1016/0167-9260(86)90010-6},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Spaanenburg86b.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Svensson86,
  author       = {Christer Svensson},
  title        = {Signal resynchronization in {VLSI} systems},
  journal      = {Integr.},
  volume       = {4},
  number       = {1},
  pages        = {75--80},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90039-8},
  doi          = {10.1016/0167-9260(86)90039-8},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Svensson86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Wang86,
  author       = {Cheng T. Wang},
  title        = {{VLSI} architecture for device simulation},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {135--153},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80004-9},
  doi          = {10.1016/S0167-9260(86)80004-9},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Wang86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Wilde86,
  author       = {Philippe De Wilde},
  title        = {The {SPIRIT} of {ESPRIT}},
  journal      = {Integr.},
  volume       = {4},
  number       = {2},
  pages        = {193},
  year         = {1986},
  url          = {https://doi.org/10.1016/S0167-9260(86)80008-6},
  doi          = {10.1016/S0167-9260(86)80008-6},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Wilde86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/WongL86,
  author       = {D. F. Wong and
                  C. L. Liu},
  title        = {Compacted channel routing with via placement restrictions},
  journal      = {Integr.},
  volume       = {4},
  number       = {4},
  pages        = {287--307},
  year         = {1986},
  url          = {https://doi.org/10.1016/0167-9260(86)90011-8},
  doi          = {10.1016/0167-9260(86)90011-8},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/integration/WongL86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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