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Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 26 matches

• 1986
• 
  Emile H. L. Aarts, Frans M. J. de Bont, Erik H. A. Habers, Peter J. M. van Laarhoven:
  Parallel implementations of the statistical cooling algorithm. Integr. 4(3): 209-238 (1986)
• 
  Morris Balamut, Ed Kinnen, Rosanne Wyleczuk:
  SPICE Rack - the newsletter of the SPICE users group : Volume 4, number 1, fall 1985. Integr. 4(1): 35-41 (1986)
• 
  Magdy A. Bayoumi:
  Lower bounds for VLSI implementation of residue number system architectures. Integr. 4(3): 263-269 (1986)
• 
  M. Bergman:
  "Introduction to nMOS and cMOS VLSI Systems Design" by Amar Mukherjee, from: Prentice-Hall, Englewood Cliffs, NJ 07632, U.S.A.. Integr. 4(2): 195-196 (1986)
• 
  Sergio Cesare Brofferio, Michele Taliercio:
  PLA implementation of a differential predictive coder for digital television signals. Integr. 4(4): 331-343 (1986)
• 
  Howard C. Card, Werner Pries, Robert D. McLeod:
  Contributions to VLSI computational complexity theory from bounds on current density. Integr. 4(2): 175-183 (1986)
• 
  Bruce W. Char:
  Computer algebra and logic programming. Integr. 4(3): 271-274 (1986)
• 
  L. G. Chen, Jau-Yien Lee, Jhing-Fa Wang, K. T. Chen:
  Fast execution for circuit consistency verification. Integr. 4(3): 239-262 (1986)
• 
  Salim U. Chowdhury, Melvin A. Breuer:
  An O(n) algorithm for width determination of power/ground routes for VLSI circuits. Integr. 4(4): 345-355 (1986)
• 
  Tam-Anh Chu:
  On the models for designing VLSI asynchronous digital systems. Integr. 4(2): 99-113 (1986)
• 
  William F. Clocksin, Miriam Leeser:
  Automatic determination of signal flow through MOS transistor networks. Integr. 4(1): 53-63 (1986)
• 
  Evert Dijkstra, Christian Piguet:
  On minimizing memory in systolic arrays for the dynamic time warping algorithm. Integr. 4(2): 155-173 (1986)
• 
  H. Groen:
  "X/OPEN Portability Guide" by the X/OPEN Group, from: Elsevier SciencePublishers B.V., Book Order Department, P.O. Box 211, 1000 AE Amsterdam, The Netherlands. Integr. 4(2): 195 (1986)
• 
  J. S. T. Huang, J. M. Daughton:
  Yield optimization in wafer scale circuits with hierarchical redundancies. Integr. 4(1): 43-51 (1986)
• 
  Hans-Werner Lang:
  The instruction systolic array - a parallel architecture for VLSI. Integr. 4(1): 65-74 (1986)
• 
  Thomas Lengauer, Stefan Näher:
  An analysis of ternary simulation as a tool for race detection in digital MOS circuits. Integr. 4(4): 309-330 (1986)
• 
  Hiroshi Miyashita, Tohru Adachi, Kazuhiro Ueda:
  An automatic cell pattern generation system for CMOS transistor-pair array LSI. Integr. 4(2): 115-133 (1986)
• 
  John C. Peterson, Kent F. Smith:
  MASHER: An automatic VLSI layout system. Integr. 4(1): 3-33 (1986)
• 
  J. G. Rathmell:
  Information flow in VLSI design. Integr. 4(2): 185-191 (1986)
• 
  Lambert Spaanenburg:
  Editorial. Integr. 4(1): 1 (1986)
• 
  Lambert Spaanenburg:
  Editorial. Integr. 4(2): 97 (1986)
• 
  Lambert Spaanenburg:
  Editorial. Integr. 4(4): 285 (1986)
• 
  Christer Svensson:
  Signal resynchronization in VLSI systems. Integr. 4(1): 75-80 (1986)
• 
  Cheng T. Wang:
  VLSI architecture for device simulation. Integr. 4(2): 135-153 (1986)
• 
  Philippe De Wilde:
  The SPIRIT of ESPRIT. Integr. 4(2): 193 (1986)
• 
  D. F. Wong, C. L. Liu:
  Compacted channel routing with via placement restrictions. Integr. 4(4): 287-307 (1986)