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@article{DBLP:journals/ijrc/AhmedACG18,
  author       = {Omar Ahmed and
                  Shawki Areibi and
                  Robert Collier and
                  Gary William Grewal},
  title        = {Corrigendum to "An Impulse-C Hardware Accelerator for Packet Classification
                  Based on Fine/Coarse Grain Optimization"},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  pages        = {6075043:1},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/6075043},
  doi          = {10.1155/2018/6075043},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/AhmedACG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/AhmedACK18,
  author       = {Omar Ahmed and
                  Shawki Areibi and
                  Karanvir Chattha and
                  Ben Kelly},
  title        = {Corrigendum to "PCIU: Hardware Implementations of an Efficient Packet
                  Classification Algorithm with an Incremental Update Capability"},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/9595171},
  doi          = {10.1155/2018/9595171},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/AhmedACK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/AhmedAG18,
  author       = {Omar Ahmed and
                  Shawki Areibi and
                  Gary Gr{\'{e}}wal},
  title        = {Corrigendum to "Hardware Accelerators Targeting a Novel Group Based
                  Packet Classification Algorithm"},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/3489169},
  doi          = {10.1155/2018/3489169},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/AhmedAG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/ChenMNZ18,
  author       = {Qianqiao Chen and
                  Vaibhawa Mishra and
                  Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez and
                  Georgios Zervas},
  title        = {Reconfigurable Network Stream Processing on Virtualized {FPGA} Resources},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/8785903},
  doi          = {10.1155/2018/8785903},
  timestamp    = {Mon, 06 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/ChenMNZ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/DasP18,
  author       = {Nitish Das and
                  P. Aruna Priya},
  title        = {{FPGA} Implementation of Reconfigurable Finite State Machine with
                  Input Multiplexing Architecture Using Hungarian Method},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  pages        = {6831901:1--6831901:15},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/6831901},
  doi          = {10.1155/2018/6831901},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/DasP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/GuoWTTXJ18,
  author       = {Shuaizhi Guo and
                  Tianqi Wang and
                  Linfeng Tao and
                  Teng Tian and
                  Zikun Xiang and
                  Xi Jin},
  title        = {RP-Ring: {A} Heterogeneous Multi-FPGA Accelerator},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/6784319},
  doi          = {10.1155/2018/6784319},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/GuoWTTXJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/KechicheTO18,
  author       = {Lilia Kechiche and
                  Lamjed Touil and
                  Bouraoui Ouni},
  title        = {Toward the Implementation of an ASIC-Like System on {FPGA} for Real-Time
                  Video Processing with Power Reduction},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/2843582},
  doi          = {10.1155/2018/2843582},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/KechicheTO18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/LuoWQYWZFXLY18,
  author       = {Li Luo and
                  Yakun Wu and
                  Fei Qiao and
                  Yi Yang and
                  Qi Wei and
                  Xiaobo Zhou and
                  Yongkai Fan and
                  Shuzheng Xu and
                  Xinjun Liu and
                  Huazhong Yang},
  title        = {Design of FPGA-Based Accelerator for Convolutional Neural Network
                  under Heterogeneous Computing Framework with OpenCL},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  pages        = {1785892:1--1785892:10},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/1785892},
  doi          = {10.1155/2018/1785892},
  timestamp    = {Wed, 14 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ijrc/LuoWQYWZFXLY18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/MahmoodTOS18,
  author       = {Faisal Mahmood and
                  Mart Toots and
                  Lars{-}G{\"{o}}ran {\"{O}}fverstedt and
                  Ulf Skoglund},
  title        = {Algorithm and Architecture Optimization for 2D Discrete Fourier Transforms
                  with Simultaneous Edge Artifact Removal},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  pages        = {1403181:1--1403181:17},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/1403181},
  doi          = {10.1155/2018/1403181},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/MahmoodTOS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/SilvaBDT18,
  author       = {Bruno da Silva and
                  An Braeken and
                  Federico Dom{\'{\i}}nguez and
                  Abdellah Touhafi},
  title        = {Exploiting Partial Reconfiguration through PCIe for a Microphone Array
                  Network Emulator},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/3214679},
  doi          = {10.1155/2018/3214679},
  timestamp    = {Tue, 16 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ijrc/SilvaBDT18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/UchevlerS18,
  author       = {Bahram N. Uchevler and
                  Kjetil Svarstad},
  title        = {Modelling and Assertion-Based Verification of Run-Time Reconfigurable
                  Designs Using Functional Programming Abstractions},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  pages        = {3276159:1--3276159:25},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/3276159},
  doi          = {10.1155/2018/3276159},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ijrc/UchevlerS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijrc/YiuL18,
  author       = {Ka Fai Cedric Yiu and
                  Siow Yong Low},
  title        = {On a Real-Time Blind Signal Separation Noise Reduction System},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2018},
  pages        = {3721756:1--3721756:9},
  year         = {2018},
  url          = {https://doi.org/10.1155/2018/3721756},
  doi          = {10.1155/2018/3721756},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/YiuL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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