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@article{DBLP:journals/et/Agrawal97,
author = {Vishwani D. Agrawal},
title = {Editorial},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {5},
year = {1997},
url = {https://doi.org/10.1023/A:1008281312295},
doi = {10.1023/A:1008281312295},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Agrawal97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Agrawal97a,
author = {Vishwani D. Agrawal},
title = {Editorial},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {171},
year = {1997},
url = {https://doi.org/10.1023/A:1008278506112},
doi = {10.1023/A:1008278506112},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Agrawal97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/AminV97,
author = {Minesh B. Amin and
Bapiraju Vinnakota},
title = {Workload Distribution in Fault Simulation},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {277--282},
year = {1997},
url = {https://doi.org/10.1023/A:1008275810655},
doi = {10.1023/A:1008275810655},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/AminV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/BushnellG97,
author = {Michael L. Bushnell and
John Giraldi},
title = {A Functional Decomposition Method for Redundancy Identification and
Test Generation},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {175--195},
year = {1997},
url = {https://doi.org/10.1023/A:1008207423859},
doi = {10.1023/A:1008207423859},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/BushnellG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DasK97,
author = {Debaleena Das and
Mark G. Karpovsky},
title = {Exhaustive and Near-Exhaustive Memory Testing Techniques and their
{BIST} Implementations},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {215--229},
year = {1997},
url = {https://doi.org/10.1023/A:1008215624768},
doi = {10.1023/A:1008215624768},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DasK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DavidBJ97,
author = {Ren{\'{e}} David and
Janusz A. Brzozowski and
Helmut J{\"{u}}rgensen},
title = {Testing for Bounded Faults in RAMs},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {197--214},
year = {1997},
url = {https://doi.org/10.1023/A:1008263507929},
doi = {10.1023/A:1008263507929},
timestamp = {Mon, 05 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DavidBJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/FavalliD97,
author = {Michele Favalli and
Marcello Dalpasso},
title = {Symbolic Handling of Bridging Fault Effects},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {271--276},
year = {1997},
url = {https://doi.org/10.1023/A:1008223826585},
doi = {10.1023/A:1008223826585},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/FavalliD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Flint97,
author = {Andrew Flint},
title = {{MCM} Test Strategy Synthesis from Chip Test and Board Test Approaches},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {65--76},
year = {1997},
url = {https://doi.org/10.1023/A:1008222615021},
doi = {10.1023/A:1008222615021},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Flint97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/GattikerM97,
author = {Anne E. Gattiker and
Wojciech Maly},
title = {Smart Substrate MCMs},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {39--53},
year = {1997},
url = {https://doi.org/10.1023/A:1008218414112},
doi = {10.1023/A:1008218414112},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/GattikerM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Gilg97,
author = {Larry Gilg},
title = {Known Good Die},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {15--25},
year = {1997},
url = {https://doi.org/10.1023/A:1008262229133},
doi = {10.1023/A:1008262229133},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Gilg97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Jarwala97,
author = {Najmi T. Jarwala},
title = {Designing "Dual Personality" {IEEE} 1149.1 Compliant Multi-Chip Modules},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {77--86},
year = {1997},
url = {https://doi.org/10.1023/A:1008274631859},
doi = {10.1023/A:1008274631859},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Jarwala97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/JorgensonW97,
author = {Joel A. Jorgenson and
Russell J. Wagner},
title = {Design-For-Test in a Multiple Substrate Multichip Module},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {97--107},
year = {1997},
url = {https://doi.org/10.1023/A:1008278700000},
doi = {10.1023/A:1008278700000},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/JorgensonW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MiuraNF97,
author = {Katsuyoshi Miura and
Koji Nakamae and
Hiromu Fujioka},
title = {Hierarchical {VLSI} Fault Tracing by Successive Circuit Extraction
from {CAD} Layout Data in the CAD-Linked {EB} Test System},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {255--269},
year = {1997},
url = {https://doi.org/10.1023/A:1008271709747},
doi = {10.1023/A:1008271709747},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/MiuraNF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MurphyAS97,
author = {Cynthia F. Murphy and
Magdy S. Abadir and
Peter Sandborn},
title = {Economic Analysis of Test Process Flows for Multichip Modules Using
Known Good Die},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {151--166},
year = {1997},
url = {https://doi.org/10.1023/A:1008239018655},
doi = {10.1023/A:1008239018655},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/MurphyAS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/NagvajaraLNW97,
author = {Prawat Nagvajara and
J. Lin and
P. Nilagupta and
C. Wang},
title = {Multichip Module Diagnosis by Product-Code Signatures},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {127--136},
year = {1997},
url = {https://doi.org/10.1023/A:1008234917747},
doi = {10.1023/A:1008234917747},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/NagvajaraLNW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Posse97,
author = {Ken Posse},
title = {A Formalization of the {IEEE} 1149.1-1990 Diagnostic Methodology as
Applied to Multichip Modules},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {119--125},
year = {1997},
url = {https://doi.org/10.1023/A:1008282800908},
doi = {10.1023/A:1008282800908},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Posse97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/RavikumarAA97,
author = {C. P. Ravikumar and
Nitin Agrawal and
Parul Agarwal},
title = {Hierarchical Delay Test Generation},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {231--244},
year = {1997},
url = {https://doi.org/10.1023/A:1008267608838},
doi = {10.1023/A:1008267608838},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/RavikumarAA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Savir97,
author = {Jacob Savir},
title = {Delay Test Generation: {A} Hardware Perspective},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {245--254},
year = {1997},
url = {https://doi.org/10.1023/A:1008219725676},
doi = {10.1023/A:1008219725676},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Savir97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Savir97a,
author = {Jacob Savir},
title = {Module Level Weighted Random Patterns},
journal = {J. Electron. Test.},
volume = {10},
number = {3},
pages = {283--287},
year = {1997},
url = {https://doi.org/10.1023/A:1008227927494},
doi = {10.1023/A:1008227927494},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Savir97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SchmidSBGS97,
author = {Ralf Schmid and
Reinhold Schmitt and
Matthias Brunner and
Oliver Gessner and
Matthias Sturm},
title = {Electron Beam Probing - {A} Solution for {MCM} Test and Failure Analysis},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {55--63},
year = {1997},
url = {https://doi.org/10.1023/A:1008270430950},
doi = {10.1023/A:1008270430950},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SchmidSBGS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/StoreyM97,
author = {Thomas M. Storey and
Bruce McWilliam},
title = {A Test Methodology for High Performance MCMs},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {109--118},
year = {1997},
url = {https://doi.org/10.1023/A:1008230816838},
doi = {10.1023/A:1008230816838},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/StoreyM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SwaminathanKC97,
author = {Madhavan Swaminathan and
Bruce C. Kim and
Abhijit Chatterjee},
title = {A Survey of Test Techniques for {MCM} Substrates},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {27--38},
year = {1997},
url = {https://doi.org/10.1023/A:1008214330042},
doi = {10.1023/A:1008214330042},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SwaminathanKC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/TegethoffC97,
author = {Mick Tegethoff and
Tom Chen},
title = {Simulation Techniques for the Manufacturing Test of MCMs},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {137--149},
year = {1997},
url = {https://doi.org/10.1023/A:1008286901817},
doi = {10.1023/A:1008286901817},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/TegethoffC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Zorian97,
author = {Yervant Zorian},
title = {Guest Editorial},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {6},
year = {1997},
url = {https://doi.org/10.1023/A:1008299825351},
doi = {10.1023/A:1008299825351},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Zorian97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Zorian97a,
author = {Yervant Zorian},
title = {Fundamentals of {MCM} Testing and Design-for-Testability},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {7--14},
year = {1997},
url = {https://doi.org/10.1023/A:1008204009421},
doi = {10.1023/A:1008204009421},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Zorian97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ZorianB97,
author = {Yervant Zorian and
Hakim Bederr},
title = {An Effective Multi-Chip {BIST} Scheme},
journal = {J. Electron. Test.},
volume = {10},
number = {1-2},
pages = {87--95},
year = {1997},
url = {https://doi.org/10.1023/A:1008226715929},
doi = {10.1023/A:1008226715929},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ZorianB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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