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@inproceedings{DBLP:conf/mtdt/DagaPMRMGA00,
  author       = {Jean Michel Daga and
                  Caroline Papaix and
                  Marc Merandat and
                  Stephane Ricard and
                  Giuseppe Medulla and
                  Jeanine Guichaoua and
                  Daniel Auvergne},
  title        = {Design Techniques for Embedded {EEPROM} Memories in Portable {ASIC}
                  and {ASSP} Solutions},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {39--46},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868614},
  doi          = {10.1109/MTDT.2000.868614},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/DagaPMRMGA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/FreyGITS00,
  author       = {Christophe Frey and
                  F. Genevaux and
                  C. Issartel and
                  D. Turgis and
                  Jean{-}Pierre Schoellkopf},
  title        = {A Low Voltage Embedded Single Port {SRAM} Generator in a 0.18{\(\mathrm{\mu}\)}m
                  Standard {CMOS} Process},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {106--112},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868623},
  doi          = {10.1109/MTDT.2000.868623},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/FreyGITS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/HamdiouiGRE00,
  author       = {Said Hamdioui and
                  Ad J. van de Goor and
                  Mike Rodgers and
                  David Eastwick},
  title        = {March Tests for Realistic Faults in Two-Port Memories},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {73--78},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868618},
  doi          = {10.1109/MTDT.2000.868618},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/HamdiouiGRE00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Haythornthwaite00,
  author       = {Ray Haythornthwaite},
  title        = {Failure Mechanisms in Semiconductor Memory Circuits},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {7--13},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868609},
  doi          = {10.1109/MTDT.2000.868609},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Haythornthwaite00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/JeeCIP00,
  author       = {Alvin Jee and
                  Jonathon E. Colburn and
                  V. Swamy Irrinki and
                  Mukesh Puri},
  title        = {Optimizing Memory Tests by Analyzing Defect Coverage},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {20--28},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868611},
  doi          = {10.1109/MTDT.2000.868611},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/JeeCIP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/KhouriMGT00,
  author       = {Osama Khouri and
                  Rino Micheloni and
                  Stefano Gregori and
                  Guido Torelli},
  title        = {Fast Voltage Regulator for Multilevel Flash Memories},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {34--38},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868613},
  doi          = {10.1109/MTDT.2000.868613},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/KhouriMGT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LinesAMMMKM00,
  author       = {Valerie Lines and
                  Abdullah Ahmed and
                  Peter Ma and
                  Stanley Ma and
                  Robert McKenzie and
                  Hong{-}Seok Kim and
                  Cynthia Mar},
  title        = {66MHz 2.3M Ternary Dynamic Content Addressable Memory},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {101--105},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868622},
  doi          = {10.1109/MTDT.2000.868622},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LinesAMMMKM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/MicheloniZCKT00,
  author       = {Rino Micheloni and
                  Matteo Zammattio and
                  Giovanni Campardo and
                  Osama Khouri and
                  Guido Torelli},
  title        = {Hierarchical Sector Biasing Organization for Flash Memories},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {29--33},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868612},
  doi          = {10.1109/MTDT.2000.868612},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/MicheloniZCKT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/NiggemeyerRR00,
  author       = {Dirk Niggemeyer and
                  Elizabeth M. Rudnick and
                  Michael Redeker},
  title        = {Diagnostic Testing of Embedded Memories Based on Output Tracing},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {113--118},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868624},
  doi          = {10.1109/MTDT.2000.868624},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/NiggemeyerRR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Rajkanan00,
  author       = {Kamal Rajkanan},
  title        = {Yield Analysis Methodology for Low Defectivity Wafer Fabs},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {65--72},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868617},
  doi          = {10.1109/MTDT.2000.868617},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Rajkanan00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/RedekerRLN00,
  author       = {Michael Redeker and
                  Markus Rudack and
                  Thomas Lobbe and
                  Dirk Niggemeyer},
  title        = {Using GLFSRs for Pseudo-Random Memory {BIST}},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {85--94},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868620},
  doi          = {10.1109/MTDT.2000.868620},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/RedekerRLN00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Shiue00,
  author       = {Wen{-}Tsong Shiue},
  title        = {Optimizing Memory Bandwidth with {ILP} Based Memory Exploration and
                  Assignment for Low Power Embedded Systems},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {95--100},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868621},
  doi          = {10.1109/MTDT.2000.868621},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Shiue00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Truong00,
  author       = {Khoan Truong},
  title        = {A Simple Built-In Self Test For Dual Ported SRAMs},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {79--84},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868619},
  doi          = {10.1109/MTDT.2000.868619},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Truong00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Vollrath00,
  author       = {J{\"{o}}rg E. Vollrath},
  title        = {Synchronous Dynamic Memory Test Construction: {A} Field Approach},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {59--64},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868616},
  doi          = {10.1109/MTDT.2000.868616},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Vollrath00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/YangM00,
  author       = {Zemo Yang and
                  Samiha Mourad},
  title        = {Crosstalk in Deep Submicron DRAMs},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {125--130},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868626},
  doi          = {10.1109/MTDT.2000.868626},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/YangM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ZarrinehAD00,
  author       = {Kamran Zarrineh and
                  R. Dean Adams and
                  Aneesha P. Deo},
  title        = {Defect Analysis and Realistic Fault Model Extensions for Static Random
                  Access Memories},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {119--124},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868625},
  doi          = {10.1109/MTDT.2000.868625},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ZarrinehAD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ZhangBH00,
  author       = {Ruili Zhang and
                  William C. Black Jr. and
                  Marwan M. Hassoun},
  title        = {Windowed {MRAM} Sensing Scheme},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {47--58},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868615},
  doi          = {10.1109/MTDT.2000.868615},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ZhangBH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ZhaoML00,
  author       = {Jun Zhao and
                  Fred J. Meyer and
                  Fabrizio Lombardi},
  title        = {Diagnosing the Interconnect of Bus-Connected Multi-RAM Systems under
                  Restricted and General Fault Models},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {14--19},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868610},
  doi          = {10.1109/MTDT.2000.868610},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ZhaoML00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtdt/2000,
  title        = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/6973/proceeding},
  isbn         = {0-7695-0689-5},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/2000.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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