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@inproceedings{DBLP:conf/fpga/AggarwalGS06,
author = {Vikas Aggarwal and
Alan D. George and
K. Clint Slatton},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Reconfigurable computing with multiscale data fusion for remote sensing},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {235},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117261},
doi = {10.1145/1117201.1117261},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AggarwalGS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AtienoAGT06,
author = {Lilian Atieno and
Jonathan Allen and
Dennis Goeckel and
Russell Tessier},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {An adaptive Reed-Solomon errors-and-erasures decoder},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {150--158},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117224},
doi = {10.1145/1117201.1117224},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AtienoAGT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BeauchampHUH06,
author = {Michael J. Beauchamp and
Scott Hauck and
Keith D. Underwood and
K. Scott Hemmert},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Embedded floating-point units in FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {12--20},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117204},
doi = {10.1145/1117201.1117204},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BeauchampHUH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BruchonTSC06,
author = {Nicolas Bruchon and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Magnetic tunnelling junction based {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {123--130},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117220},
doi = {10.1145/1117201.1117220},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BruchonTSC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CampregherCCV06,
author = {Nicola Campregher and
Peter Y. K. Cheung and
George A. Constantinides and
Milan Vasilko},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Yield enhancements of design-specific FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {93--100},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117215},
doi = {10.1145/1117201.1117215},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CampregherCCV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChoML06,
author = {Young H. Cho and
James Moscola and
John W. Lockwood},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Context-free-grammar based token tagger in reconfigurable devices},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {237},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117265},
doi = {10.1145/1117201.1117265},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChoML06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChongKB06,
author = {Jike Chong and
Chidamber Kulkarni and
Gordon J. Brebner},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Building a flexible and scalable {DRAM} interface for networking applications
on FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {233},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117258},
doi = {10.1145/1117201.1117258},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/ChongKB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ClarkS06,
author = {Christopher R. Clark and
David E. Schimmel},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Modeling the data-dependent performance of pattern-matching architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {73--82},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117212},
doi = {10.1145/1117201.1117212},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ClarkS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CongM06,
author = {Jason Cong and
Kirill Minkovich},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Optimality study of logic synthesis for LUT-based FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {33--40},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117207},
doi = {10.1145/1117201.1117207},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CongM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CoutureK06,
author = {Nathaniel Couture and
Kenneth B. Kent},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Periodic licensing of {FPGA} based intellectual property},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {234},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117259},
doi = {10.1145/1117201.1117259},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CoutureK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/EguroH06,
author = {Kenneth Eguro and
Scott Hauck},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Armada: timing-driven pipeline-aware routing for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {169--178},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117227},
doi = {10.1145/1117201.1117227},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/EguroH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FengG06,
author = {Wenyi Feng and
Jonathan W. Greene},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Post-placement interconnect entropy},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {227},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117242},
doi = {10.1145/1117201.1117242},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/FengG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GilroyIB06,
author = {Michael P. Gilroy and
James Irvine and
William Berrie},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {{FPGA} based {RAID} 6 hardware accelerator},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {232},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117254},
doi = {10.1145/1117201.1117254},
timestamp = {Wed, 03 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/GilroyIB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HanHK06,
author = {Youngsun Han and
Seokjoong Hwang and
Seon Wook Kim},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Jaguar: a compiler infrastructure for Java reconfigurable computing},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {228},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117246},
doi = {10.1145/1117201.1117246},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HanHK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HiokiKTNSK06,
author = {Masakazu Hioki and
Takashi Kawanami and
Toshiyuki Tsutsumi and
Tadashi Nakagawa and
Toshihiro Sekigawa and
Hanpei Koike},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Evaluation of granularity on threshold voltage control in flex power
{FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {223},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117235},
doi = {10.1145/1117201.1117235},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HiokiKTNSK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HollandH06,
author = {Mark Holland and
Scott Hauck},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Improving performance and robustness of domain-specific CPLDs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {50--59},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117209},
doi = {10.1145/1117201.1117209},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HollandH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HongNL06,
author = {Jumnit Hong and
Eriko Nurvitadhi and
Shih{-}Lien Lu},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Design, implementation, and verification of active cache emulator
{(ACE)}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {63--72},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117211},
doi = {10.1145/1117201.1117211},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HongNL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KobataIS06,
author = {Masaki Kobata and
Masahiro Iida and
Toshinori Sueyoshi},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Effective clustering technique to optimize routability of outer cluster
nets},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {229},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117247},
doi = {10.1145/1117201.1117247},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KobataIS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KuonR06,
author = {Ian Kuon and
Jonathan Rose},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Measuring the gap between FPGAs and ASICs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {21--30},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117205},
doi = {10.1145/1117201.1117205},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KuonR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LamoureuxW06,
author = {Julien Lamoureux and
Steven J. E. Wilton},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {{FPGA} clock network architecture: flexibility vs. area and power},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {101--108},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117216},
doi = {10.1145/1117201.1117216},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LamoureuxW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LinGLW06,
author = {Mingjie Lin and
Abbas El Gamal and
Yi{-}Chang Lu and
S. Simon Wong},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Performance benefits of monolithically stacked 3D-FPGA},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {113--122},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117219},
doi = {10.1145/1117201.1117219},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/LinGLW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuCC06,
author = {Jianhua Liu and
Michael Chang and
Chung{-}Kuan Cheng},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {An iterative division algorithm for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {83--89},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117213},
doi = {10.1145/1117201.1117213},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiuCC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MatsumotoKM06,
author = {Yohei Matsumoto and
Hanpei Koike and
Akira Masaki},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {FPGAs with multidimensional mesh topology},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {223},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117234},
doi = {10.1145/1117201.1117234},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MatsumotoKM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MhamdiKV06,
author = {Lotfi Mhamdi and
Christopher Kachris and
Stamatis Vassiliadis},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A reconfigurable hardware based embedded scheduler for buffered crossbar
switches},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {143--149},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117223},
doi = {10.1145/1117201.1117223},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/MhamdiKV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MilderAHP06,
author = {Peter A. Milder and
Mohammad Ahmad and
James C. Hoe and
Markus P{\"{u}}schel},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Fast and accurate resource estimation of automatically generated custom
{DFT} {IP} cores},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {211--220},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117232},
doi = {10.1145/1117201.1117232},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/MilderAHP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MirzaeiHK06,
author = {Shahnam Mirzaei and
Anup Hosangadi and
Ryan Kastner},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {High speed {FIR} filter implementation using add and shift method},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {231},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117251},
doi = {10.1145/1117201.1117251},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MirzaeiHK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MishchenkoCB06,
author = {Alan Mishchenko and
Satrajit Chatterjee and
Robert K. Brayton},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Improvements to technology mapping for LUT-based FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {41--49},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117208},
doi = {10.1145/1117201.1117208},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MishchenkoCB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MrabetMSM06,
author = {Hayder Mrabet and
Zied Marrakchi and
Pierre Souillot and
Habib Mehrez},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A multilevel hierarchical interconnection structure for {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {225},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117239},
doi = {10.1145/1117201.1117239},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MrabetMSM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NakaharaKION06,
author = {Kentaro Nakahara and
Shin'ichi Kouyama and
Tomonori Izumi and
Hiroyuki Ochi and
Yukihiro Nakamura},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Autonomous-repair cell for fault tolerant dynamic-reconfigurable devices},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {224},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117237},
doi = {10.1145/1117201.1117237},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/NakaharaKION06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NguyenMC06,
author = {David T. Nguyen and
Gokhan Memik and
Alok N. Choudhary},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A reconfigurable architecture for network intrusion detection using
principal component analysis},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {235},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117262},
doi = {10.1145/1117201.1117262},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/NguyenMC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NiamatNJ06,
author = {Mohammed Y. Niamat and
Dinesh Nemade and
Mohsin M. Jamali},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Testing embedded {RAM} modules in SRAM-based FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {228},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117245},
doi = {10.1145/1117201.1117245},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/NiamatNJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NoseworthyL06,
author = {Joshua Noseworthy and
Miriam Leeser},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Efficient use of communications between an FPGA's embedded processor
and its reconfigurable logic},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {233},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117257},
doi = {10.1145/1117201.1117257},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/NoseworthyL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PramstallerRR06,
author = {Norbert Pramstaller and
Christian Rechberger and
Vincent Rijmen},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A compact {FPGA} implementation of the hash function whirlpool},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {159--166},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117225},
doi = {10.1145/1117201.1117225},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/PramstallerRR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RoseS06,
author = {Garrett S. Rose and
Mircea R. Stan},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A programmable majority logic array using molecular scale electronics},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {225},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117238},
doi = {10.1145/1117201.1117238},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/RoseS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SaldanaSC06,
author = {Manuel Salda{\~{n}}a and
Lesley Shannon and
Paul Chow},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {The routability of multiprocessor network topologies in FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {232},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117253},
doi = {10.1145/1117201.1117253},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SaldanaSC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ScrofanoP06,
author = {Ronald Scrofano and
Viktor K. Prasanna},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A Performance model for accelerating scientific applications on reconfigurable
computers},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {234},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117260},
doi = {10.1145/1117201.1117260},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ScrofanoP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SimsI06,
author = {Oliver Sims and
James Irvine},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A real-time implementation of Richardson-Lucy deconvolution},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {232},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117255},
doi = {10.1145/1117201.1117255},
timestamp = {Fri, 03 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SimsI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SingarajuC06,
author = {Janardhan Singaraju and
John A. Chandy},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A generic lookup cache architecture for network processing applications},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {233},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117256},
doi = {10.1145/1117201.1117256},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SingarajuC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SioziosTST06,
author = {Kostas Siozios and
Konstantinos Tatas and
Dimitrios Soudris and
Antonios Thanailakis},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A novel methodology for designing high-performance and low-energy
{FPGA} routing architecture},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {224},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117236},
doi = {10.1145/1117201.1117236},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SioziosTST06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/StrukovL06,
author = {Dmitri B. Strukov and
Konstantin K. Likharev},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A reconfigurable architecture for hybrid CMOS/Nanodevice circuits},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {131--140},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117221},
doi = {10.1145/1117201.1117221},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/StrukovL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SubramaniyanTGS06,
author = {Rajagopal Subramaniyan and
Ian A. Troxel and
Alan D. George and
Melissa C. Smith},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Simulative analysis of dynamic scheduling heuristics for reconfigurable
computing of parallel applications},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {230},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117249},
doi = {10.1145/1117201.1117249},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SubramaniyanTGS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SunWN06,
author = {Welson Sun and
Michael J. Wirthlin and
Stephen Neuendorffer},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Combining module selection and resource sharing for efficient {FPGA}
pipeline synthesis},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {179--188},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117228},
doi = {10.1145/1117201.1117228},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SunWN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TachibanaMSYI06,
author = {Tatsuhiro Tachibana and
Yoshihiro Murata and
Naoki Shibata and
Keiichi Yasumoto and
Minoru Ito},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Flexible implementation of genetic algorithms on FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {236},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117264},
doi = {10.1145/1117201.1117264},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TachibanaMSYI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TehranipoorR06,
author = {Mohammad Tehranipoor and
Reza M. Rad},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Fine-grained island style architecture for molecular electronic devices},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {226},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117241},
doi = {10.1145/1117201.1117241},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TehranipoorR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TehranipoorR06a,
author = {Mohammad Tehranipoor and
Reza M. Rad},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Test and recovery for fine-grained nanoscale architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {226},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117240},
doi = {10.1145/1117201.1117240},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TehranipoorR06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TessierBNG06,
author = {Russell Tessier and
Vaughn Betz and
David Neto and
Thiagaraja Gopalsamy},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Power-aware {RAM} mapping for {FPGA} embedded memory blocks},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {189--198},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117229},
doi = {10.1145/1117201.1117229},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TessierBNG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TichyNG06,
author = {Milan Tich{\'{y}} and
Andy Nisbet and
David Gregg},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {{GSFAP} adaptive filtering using log arithmetic for resource-constrained
embedded systems},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {236},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117263},
doi = {10.1145/1117201.1117263},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TichyNG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TranKT06,
author = {Thinh Ngoc Tran and
Surin Kittitornkun and
Shigenori Tomiyama},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Manifold similarity search of {DNA} sequences with reconfigurable
hardware},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {231},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117252},
doi = {10.1145/1117201.1117252},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TranKT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TuanKRDT06,
author = {Tim Tuan and
Sean Kao and
Arifur Rahman and
Satyaki Das and
Steven Trimberger},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A 90nm low-power {FPGA} for battery-powered applications},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {3--11},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117203},
doi = {10.1145/1117201.1117203},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TuanKRDT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YiannacourasSR06,
author = {Peter Yiannacouras and
J. Gregory Steffan and
Jonathan Rose},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Application-specific customization of soft processor microarchitecture},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {201--210},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117231},
doi = {10.1145/1117201.1117231},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YiannacourasSR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YlvisakerEE06,
author = {Benjamin Ylvisaker and
Brian Van Essen and
Carl Ebeling},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A type architecture for hybrid micro-parallel computers},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {227},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117243},
doi = {10.1145/1117201.1117243},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YlvisakerEE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZiedHH06,
author = {Zied Marrakchi and
Hayder Mrabet and
Habib Mehrez},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Configuration tools for a new multilevel hierarchical {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {229},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117248},
doi = {10.1145/1117201.1117248},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZiedHH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2006,
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201},
doi = {10.1145/1117201},
isbn = {1-59593-292-5},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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