"A Compact DSP Core with Static Floating-Point Arithmetic."

Tay-Jyi Lin et al. (2006)

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DOI: 10.1007/S11265-005-4178-5

access: closed

type: Journal Article

metadata version: 2020-05-20

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  - https://dblp.org/rec/journals/vlsisp/LinLCLJ06
Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen:
A Compact DSP Core with Static Floating-Point Arithmetic. J. VLSI Signal Process. 42(2): 127-138 (2006)

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