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"Lower-Power and Min-Crosstalk Channel Routing for Deep-Submicron Layout ..."
S.-H. Nam, J. D. Cho, D. Wagner (1999)
- S.-H. Nam, J. D. Cho, D. Wagner:
Lower-Power and Min-Crosstalk Channel Routing for Deep-Submicron Layout Design. VLSI Design 10(1): 87-97 (1999)
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