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"Reversible-logic design with online testability."
Dilip P. Vasudevan et al. (2006)
- Dilip P. Vasudevan, Parag K. Lala, Jia Di, James Patrick Parkerson:
Reversible-logic design with online testability. IEEE Trans. Instrum. Meas. 55(2): 406-414 (2006)
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