"A 10-Gbps receiver bridge chip with deserializer for FPGA-based frame ..."

Pil-Ho Lee et al. (2017)

> Home

Details and statistics

DOI: 10.1109/TCE.2017.014908

access: closed

type: Journal Article

metadata version: 2020-07-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tce/LeeLKHJ17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tce/LeeLKHJ17
Pil-Ho Lee, Han-Yeol Lee, Yeong-Woong Kim, Han-Young Hong, Young-Chan Jang:
A 10-Gbps receiver bridge chip with deserializer for FPGA-based frame grabber supporting MIPI CSI-2. IEEE Trans. Consumer Electron. 63(3): 209-215 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.