"Tutorial: Design of High-Speed Nano-Scale CMOS Mixed-Voltage Digital I/O ..."

Chua-Chin Wang (2021)

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DOI: 10.1109/TCSII.2020.3041607

access: closed

type: Journal Article

metadata version: 2021-02-11

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Chua-Chin Wang:
Tutorial: Design of High-Speed Nano-Scale CMOS Mixed-Voltage Digital I/O Buffer With High Reliability to PVTL Variations. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 562-567 (2021)

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