"A 4.3 GS/s Time-Interleaved ΔΣ DAC With Temperature-Insensitive ..."

Jae-Yun Park, Jae-Won Nam (2024)

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DOI: 10.1109/TCSII.2024.3470111

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type: Journal Article

metadata version: 2024-11-30

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Jae-Yun Park, Jae-Won Nam:
A 4.3 GS/s Time-Interleaved ΔΣ DAC With Temperature-Insensitive Bias and Harmonic Cancellation for Qubit Control. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4663-4667 (2024)

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