"A 102-Gb/s/lane 1.4-Vppd Linear Range PAM-8 Receiver Frontend ..."

Sangwan Lee et al. (2024)

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DOI: 10.1109/TCSII.2024.3441060

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type: Journal Article

metadata version: 2024-11-30

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Sangwan Lee, Hyeongmin Seo, Seungwoo Son, Sunoh Yeom, Jaeduk Han:
A 102-Gb/s/lane 1.4-V_ppd Linear Range PAM-8 Receiver Frontend With Multi-Path Continuous-Time Linear Equalization in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4623-4627 (2024)

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