"An 8.8 TFLOPS/W Floating-Point RRAM-Based Compute-in-Memory Macro Using ..."

Xianwu Hu et al. (2023)

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DOI: 10.1109/TCSII.2023.3283418

access: closed

type: Journal Article

metadata version: 2023-11-09

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Xianwu Hu, Yu Wang, Zizhao Ma, Gan Wen, Zeming Wang, Zhichao Lu, Yunlong Liu, Yanlei Li, Xingdong Liang, Xiaoyang Zeng, Yufeng Xie:
An 8.8 TFLOPS/W Floating-Point RRAM-Based Compute-in-Memory Macro Using Low Latency Triangle-Style Mantissa Multiplication. IEEE Trans. Circuits Syst. II Express Briefs 70(11): 4216-4220 (2023)

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