"A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and ..."

Hyuntae Kim et al. (2024)

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DOI: 10.1109/TCSI.2024.3408648

access: closed

type: Journal Article

metadata version: 2024-11-14

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Hyuntae Kim, Yunseong Jo, Sanghun Lee, Eunsang Lee, Young Choi, Jaewoo Park, Myoungbo Kwak, Jung-Hwan Choi, Youngdon Choi, Jaeduk Han:
A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and Equalization Techniques for Next-Generation Memory Interfaces. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 4912-4923 (2024)

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