"A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With ..."

Yoonjae Choi et al. (2023)

> Home

Details and statistics

DOI: 10.1109/TCSI.2023.3272626

access: closed

type: Journal Article

metadata version: 2023-07-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcasI/ChoiPCSKPSK23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcasI/ChoiPCSKPSK23
Yoonjae Choi, Hyunsu Park, Jonghyuck Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Changmin Sim, Chulwoo Kim:
A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector. IEEE Trans. Circuits Syst. I Regul. Pap. 70(7): 2734-2743 (2023)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.