"Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in ..."

Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen (2010)

> Home

Details and statistics

DOI: 10.1109/TCSII.2009.2034198

access: closed

type: Journal Article

metadata version: 2020-05-27

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/HsiaoTW10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/HsiaoTW10
Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen:
Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in Standard Cell-Based Design Environment. IEEE Trans. Circuits Syst. II Express Briefs 57-II(1): 21-25 (2010)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.