"Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and ..."

Abhishek Patyal et al. (2023)

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DOI: 10.1109/TCAD.2022.3174166

access: closed

type: Journal Article

metadata version: 2023-11-12

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Abhishek Patyal, Hung-Ming Chen, Mark Po-Hung Lin, Guan-Qi Fang, Simon Yi-Hung Chen:
Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 266-279 (2023)

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