"Methodology for 3-D Substrate Network Extraction for SPICE Simulation of ..."

Pietro Buccella et al. (2016)

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DOI: 10.1109/TCAD.2015.2513008

access: closed

type: Journal Article

metadata version: 2021-08-17

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Pietro Buccella, Camillo Stefanucci, Hao Zou, Yasser Moursy, Ramy Iskander, Jean-Michel Sallese, Maher Kayal:
Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(9): 1489-1502 (2016)

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