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"Clock-skew-optimization methodology for substrate-noise reduction with ..."

Mustafa Badaroglu et al. (2006)

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DOI: 10.1109/TCAD.2005.855952

access: closed

type: Journal Article

metadata version: 2020-09-24

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Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man:
Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6): 1146-1154 (2006)

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